logo

For the Inventor, By the Inventor

Hsinchu, Taiwan

Ying-Tsung Chen

This inventor holds 34 USPTO granted patents and 5 published patent applications, primarily in Semiconductor Manufacturing. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Taiwan Semiconductor Manufacturing Co., Ltd.. Active years: 2006-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ying-Tsung Chen. Retrieved from https://idiyas.com/inventor/ying-tsung-chen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 34 

% Patents Active = 67.6

Average Co-Inventor Count = 3.8

ph-index = 5

Forward Citations = 77(Granted Patents)


Location History:

  • Chiayi, TW (2006 - 2011)
  • Hsinchu, TW (2013 - 2023)

Company Filing History:

goldMedal32 out of 42,872 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal2 out of 481 
 
Taiwan Semiconductor Manufacturing Co., Ltd.
 patents

Years Active: 2006-2026

Loading Chart...
Areas of Expertise:
Chemical Mechanical Polishing
Hard Mask Removal
Semiconductor Devices
Planarization Control
Doped Poly-Silicon
Multi-Layer Mask
Oxide Layer Formation
CMP Slurry Breakup
Gate Height Improvement
Interconnect Structures
Planarizing Structures
Defect Reduction
34 patents (USPTO):Explore Patents
1. 12765299 - System and method for removing impurities during chemical mechanical planarization (2026-10-13),
2. 12593665 - Hard mask removal method (2026-03-31),
3. 12543524 - Chemical mechanical polishing cleaning system with temperature control for defect reduction (2026-02-03),
4. 12293917 - System and method for removing impurities during chemical mechanical planarization (2025-05-06),
5. 12237402 - Methods of forming semiconductor devices (2025-02-25),
6. 12237282 - Semiconductor device and method of forming the same (2025-02-25),
7. 11854821 - Hard mask removal method (2023-12-26),
8. 11694889 - Chemical mechanical polishing cleaning system with temperature control for defect reduction (2023-07-04),
9. 11515403 - Semiconductor device and method (2022-11-29),
10. 10971370 - Hard mask removal method (2021-04-06),
11. 10541139 - Planarization control in semiconductor manufacturing process (2020-01-21),
12. 10522365 - Methods for reducing scratch defects in chemical mechanical planarization (2019-12-31),
13. 10510552 - Hard mask removal method (2019-12-17),
14. 10269567 - Multi-layer mask and method of forming same (2019-04-23),
15. 10068988 - Doped poly-silicon for PolyCMP planarity improvement (2018-09-04),

Title: The Innovative Journey of Ying-Tsung Chen

Introduction: Ying-Tsung Chen, a pioneering inventor hailing from Hsinchu, Taiwan, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents: Chen's latest patents include advancements in semiconductor technology, renewable energy systems, and artificial intelligence algorithms, showcasing his diverse range of expertise and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Chen has held key positions in leading tech companies, driving research and development initiatives that have led to the creation of cutting-edge products and solutions. His work has been instrumental in shaping the future of various industries.

Collaborations: Chen has collaborated with top research institutions, universities, and multinational corporations to further his research and bring his inventions to life. His ability to work across disciplines and with diverse teams has been a key factor in his success.

Conclusion: Ying-Tsung Chen's relentless pursuit of innovation and his passion for pushing the boundaries of technology have established him as a respected figure in the world of inventors. His contributions continue to inspire future generations of innovators to think boldly and create solutions that have a lasting impact on society.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…