The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2021

Filed:

Dec. 16, 2019
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Che-Hao Tu, Hsinchu, TW;

William Weilun Hong, Hsinchu, TW;

Ying-Tsung Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3105 (2006.01); H01L 21/306 (2006.01); H01L 21/8234 (2006.01); H01L 21/3213 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 21/31053 (2013.01); H01L 21/30625 (2013.01); H01L 21/823437 (2013.01); H01L 21/823456 (2013.01); H01L 21/28123 (2013.01); H01L 21/32139 (2013.01);
Abstract

A method of removing a hard mask is provided. Gate stacks are patterned on a substrate, where the gate stacks include a polysilicon layer and the hard mask deposited over the polysilicon layer. A dielectric layer is deposited on the substrate and on the patterned gate stacks. A first portion of the dielectric layer is planarized by chemical mechanical polishing (CMP) to remove a topography of the dielectric layer. The hard mask and a second portion of the dielectric layer are removed by the CMP.


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