Yi-Shien Mor

This inventor holds 32 USPTO granted patents and 1 published patent application, primarily in Semiconductor Fabrication. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2008-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yi-Shien Mor. Retrieved from https://idiyas.com/inventor/yi-shien-mor

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 32 (Patent Applications = 1)

% Patents Active = 75.0

Average Co-Inventor Count = 4.6

ph-index = 7

Forward Citations = 131(Granted Patents)

Company Filing History:

32 out of 42,810

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

Years Active: 2008-2026

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Areas of Expertise:

Gate Structure

FinFETs

High-K Metal Gate

Semiconductor Devices

Contact Bars

Fabrication Methods

Critical Dimension

Spacer Engineering

CMOS Process

N Work Function

P Work Function

Dual-Metal Gate

32 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12588229 - Gate-top dielectric structure for self-aligned contact (2026-03-24),

2. 12015030 - Gate stacks for semiconductor devices of different conductivity types (2024-06-18),

3. 11749679 - Integrated circuit structure (2023-09-05),

4. 11469227 - Semiconductor device and a method for fabricating the same (2022-10-11),

5. 11289481 - Single metal that performs N work function and P work function in a high-K/metal gate (2022-03-29),

6. 11075199 - Method of forming semiconductor structure (2021-07-27),

7. 11004747 - Fin critical dimension loading optimization (2021-05-11),

8. 10748896 - Method for fabricating semiconductor device including contact bars having narrower portions (2020-08-18),

9. 10692769 - Fin critical dimension loading optimization (2020-06-23),

10. 10529862 - Semiconductor device and method of forming semiconductor fin thereof (2020-01-07),

11. 10366989 - Semiconductor device having a contact bar over an S/D structure (2019-07-30),

12. 10204905 - Semiconductor structure and manufacturing method thereof (2019-02-12),

13. 9960160 - Method of forming a single metal that performs N work function and P work function in a high-k/metal gate process (2018-05-01),

14. 9601388 - Integrated high-K/metal gate in CMOS process flow (2017-03-21),

15. 9466696 - FinFETs and methods for forming the same (2016-10-11),

Title: The Innovative Journey of Yi-Shien Mor

Introduction: Yi-Shien Mor, a talented inventor hailing from Hsinchu, Taiwan, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents: Yi-Shien Mor's latest patents include cutting-edge technologies in the semiconductor industry, focusing on advancements in nanotechnology and microelectronics.

Career Highlights: With a career spanning over two decades, Yi-Shien Mor has worked with leading tech companies in Taiwan, spearheading research and development projects that have led to numerous patents and technological advancements.

Collaborations: Throughout his career, Yi-Shien Mor has collaborated with top researchers, engineers, and scientists in the industry, fostering a culture of innovation and pushing the boundaries of what is possible in the world of technology.

Conclusion: Yi-Shien Mor's passion for innovation and his relentless pursuit of technological advancement continue to inspire the next generation of inventors and engineers. His contributions to the field of technology have left an indelible mark, shaping the future of the industry for years to come.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: