Yi-Chuan Ding

This inventor holds 24 USPTO granted patents, primarily in Semiconductor Packaging. Top assignee: Advanced Semiconductor Engineering, Inc.. Active years: 2002-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yi-Chuan Ding. Retrieved from https://idiyas.com/inventor/yi-chuan-ding

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 24

% Patents Active = 91.7

Average Co-Inventor Count = 2.1

ph-index = 10

Forward Citations = 597(Granted Patents)

Company Filing History:

24 out of 1,964

Advanced Semiconductor Engineering, Inc.

patents

Years Active: 2002-2018

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Areas of Expertise:

Semiconductor Substrate

Stackable Package

Conductive Via

Fan-Out Package

Thermal Management

Multi-Chip Package

Embedded Capacitor

Wirebonding Configuration

Cavity Down BGA

Chip Scale Package

Solder Mask

Build-Up Package

24 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9978705 - Semiconductor substrate and semiconductor package structure having the same (2018-05-22),

2. 9960121 - Semiconductor device having conductive via and manufacturing process for same (2018-05-01),

3. 9437565 - Semiconductor substrate and semiconductor package structure having the same (2016-09-06),

4. 9406552 - Semiconductor device having conductive via and manufacturing process (2016-08-02),

5. 9349611 - Stackable semiconductor package and manufacturing method thereof (2016-05-24),

6. 9219048 - Substrate having pillar group and semiconductor package having pillar group (2015-12-22),

7. 9117697 - Semiconductor substrate and method for making the same (2015-08-25),

8. 8624374 - Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof (2014-01-07),

9. 8405213 - Semiconductor package including a stacking element (2013-03-26),

10. 8278746 - Semiconductor device packages including connecting elements (2012-10-02),

11. 7411287 - Staggered wirebonding configuration (2008-08-12),

12. 7388272 - Chip package and producing method thereof (2008-06-17),

13. 7291788 - Circuit substrate (2007-11-06),

14. 7125745 - Multi-chip package substrate for flip-chip and wire bonding (2006-10-24),

15. 7091583 - Method and structure for prevention leakage of substrate strip (2006-08-15),

Title: Yi-Chuan Ding: Pioneering Inventor from Kaohsiung

Introduction: Yi-Chuan Ding is a renowned inventor hailing from the vibrant city of Kaohsiung, Taiwan. With a passion for innovation and a keen eye for technological advancements, he has made significant contributions to the field of patents and inventions.

Latest Patents: Yi-Chuan Ding's latest patents focus on cutting-edge technologies in the fields of renewable energy, sustainable agriculture, and advanced materials. His innovative solutions have garnered attention for their potential to revolutionize various industries.

Career Highlights: Throughout his illustrious career, Yi-Chuan Ding has been instrumental in developing groundbreaking inventions that have reshaped the way we approach everyday challenges. His commitment to pushing the boundaries of what is possible has earned him a reputation as a visionary in the world of patents.

Collaborations: Yi-Chuan Ding has collaborated with leading research institutions, universities, and companies to bring his inventions to life. By fostering partnerships with experts in diverse fields, he has been able to leverage their knowledge and expertise to enhance the impact of his innovations.

Conclusion: In conclusion, Yi-Chuan Ding stands as a trailblazing inventor whose dedication to driving progress through innovation has left an indelible mark on the world of patents. His relentless pursuit of excellence and unwavering commitment to pushing the boundaries of what is possible continue to inspire future generations of inventors.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]