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For the Inventor, By the Inventor

Taichung, Taiwan

Yen-Chang Hu

This inventor holds 18 USPTO granted patents and 2 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2014-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yen-Chang Hu. Retrieved from https://idiyas.com/inventor/yen-chang-hu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 18 

% Patents Active = 100.0

Average Co-Inventor Count = 4.2

ph-index = 7

Forward Citations = 1,213(Granted Patents)


Location History:

  • Tai-Chung, TW (2014 - 2021)
  • Hsin-Chu, TW (2019 - 2021)

Company Filing History:

goldMedal18 out of 42,872 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2014-2021

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18 patents (USPTO):Explore Patents
1. 11133274 - Fan-out interconnect structure and method for forming same (2021-09-28),
2. 11101192 - Wafer level embedded heat spreader (2021-08-24),
3. 10700025 - Fan-out interconnect structure and method for forming same (2020-06-30),
4. 10177073 - Wafer level embedded heat spreader (2019-01-08),
5. 10157884 - 3D die stacking structure with fine pitches (2018-12-18),
6. 9991190 - Packaging with interposer frame (2018-06-05),
7. 9799620 - Warpage reduction and adhesion improvement of semiconductor die package (2017-10-24),
8. 9735087 - Wafer level embedded heat spreader (2017-08-15),
9. 9418969 - Packaged semiconductor devices and packaging methods (2016-08-16),
10. 9379078 - 3D die stacking structure with fine pitches (2016-06-28),
11. 9368460 - Fan-out interconnect structure and method for forming same (2016-06-14),
12. 9165887 - Semiconductor device with discrete blocks (2015-10-20),
13. 9087832 - Warpage reduction and adhesion improvement of semiconductor die package (2015-07-21),
14. 9070667 - Peripheral electrical connection of package on package (2015-06-30),
15. 9035461 - Packaged semiconductor devices and packaging methods (2015-05-19),

Title: Yen-Chang Hu: Innovator in Semiconductor Technologies

Introduction

Yen-Chang Hu, a distinguished inventor based in Tai-Chung, Taiwan, has made significant contributions to the field of semiconductor technologies, holding an impressive portfolio of 18 patents. His innovative approach has paved the way for advancements in semiconductor manufacturing processes and device architectures.

Latest Patents

Among Yen-Chang Hu’s latest patents are notable inventions such as the "Fan-out interconnect structure and method for forming same" and the "Wafer level embedded heat spreader." The former outlines a method that involves the formation of a sacrificial film layer over a die, enabling enhanced connection and reliability in semiconductor packaging. The latter patent introduces a device combining an embedded heat spreader with a unique formation method, which improves heat dissipation across semiconductor devices.

Career Highlights

Yen-Chang Hu is currently associated with Taiwan Semiconductor Manufacturing Company Ltd., where he has honed his skills and contributed greatly to the company's innovations. His expertise in semiconductor technology has been instrumental in pushing the boundaries of what's possible in chip design and manufacturing. The strategic developments he has led showcase his commitment to advancing technology within the semiconductor industry.

Collaborations

Throughout his career, Yen-Chang Hu has collaborated with talented colleagues including Ching-Wen Hsiao and Chen-Shien Chen. These partnerships have fostered a dynamic environment of innovation, allowing for the exchange of ideas and the development of cutting-edge technologies that benefit the semiconductor field.

Conclusion

Yen-Chang Hu stands as a leading figure in semiconductor innovations, with a robust portfolio that reflects his dedication to this evolving industry. His contributions are not only remarkable for their technological advancements but also for the collaborative spirit that drives meaningful progress in semiconductor manufacturing and design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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