The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2015
Filed:
Feb. 27, 2013
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Ching-Wen Hsiao, Hsin-Chu, TW;
Chih-Wei Lin, Xinfeng Township, TW;
Wei Sen Chang, Jinsha Township, TW;
Yen-Chang Hu, Tai-Chung, TW;
Kuo Lung Pan, Hsin-Chu, TW;
Yu-Chih Huang, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
Various embodiments of mechanisms for forming a die package using through sidewall vias (TsVs), which are formed by sawing through substrate via (TSV) in half, at edges of dies described enable various semiconductor dies and passive components be electrically connected to achieve targeted electrical performance. Redistribution structures with redistribution layers (RDLs) are used along with the TsVs to enable the electrical connections. Since the TsVs are away from the device regions, the device regions do not suffer from the stress caused by the TSV formation. In addition, electrical connections between upper and lower dies by the TsVs increases the efficiency of the area utilization of the die package.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile