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For the Inventor, By the Inventor

Tokyo, Japan

Yasunori Yamaguchi

This inventor holds 30 USPTO granted patents, primarily in Semiconductor Devices. Top assignees: Hitachi, Ltd., Hitachi Vlsi Engineering Corp., Hitachi Ulsi Systems Co., Ltd.. Active years: 1988-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasunori Yamaguchi. Retrieved from https://idiyas.com/inventor/yasunori-yamaguchi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 30

% Patents Active = 76.7

Average Co-Inventor Count = 5.1

ph-index = 12

Forward Citations = 516(Granted Patents)


Location History:

  • Tachikawa, JP (1988 - 1996)
  • Ohme, JP (1994 - 1997)
  • Tokyo, JP (1990 - 2009)
  • Fussa, JP (1999 - 2011)

Company Filing History:

goldMedal29 out of 42,740 
 
Hitachi, Ltd.
 patents
silverMedal7 out of 182 
 
Hitachi Vlsi Engineering Corp.
 patents
bronzeMedal3 out of 336 
 
Hitachi Ulsi Systems Co., Ltd.
 patents
4. 1 out of 26 
 
Hitachi Hokkai Semiconductor Ltd.
 patents
5. 1 out of 35 
 
Hitachi Tohbu Semiconductor, Ltd.
 patents
6. 1 out of 87 
 
Hitachi Ulsi Engineering Corp.
 patents
7. 1 out of 834,570 
Other
 patents
where one patent can have more than one assignee

Years Active: 1988-2011

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Areas of Expertise:
Semiconductor Device
Yield Prediction
Memory Device
Defect Remedy
Dynamic RAM
Multi-Chip Package
Integrated Circuit
Noise Suppression
Zigzag Bonding Pad
Dual Port Memory
Stacked Arrangement
30 patents (USPTO):Explore Patents
1. 7945410 - Semiconductor device yield prediction system and method (2011-05-17),
2. 7499340 - Semiconductor memory device and defect remedying method thereof (2009-03-03),
3. 7345929 - Semiconductor memory device and defect remedying method thereof (2008-03-18),
4. 7203101 - Semiconductor memory device and defect remedying method thereof (2007-04-10),
5. 7016236 - Semiconductor memory device and defect remedying method thereof (2006-03-21),
6. 6898130 - Semiconductor memory device and defect remedying method thereof (2005-05-24),
7. 6657901 - Semiconductor device formed in a rectangle region on a semiconductor substrate including a voltage generating circuit (2003-12-02),
8. 6515913 - Semiconductor memory device and defect remedying method thereof (2003-02-04),
9. 6335884 - Semiconductor memory device and defect remedying method thereof (2002-01-01),
10. 6212089 - Semiconductor memory device and defect remedying method thereof (2001-04-03),
11. 6160744 - Semiconductor memory device and defect remedying method thereof (2000-12-12),
12. 6049500 - Semiconductor memory device and defect remedying method thereof (2000-04-11),
13. 5910010 - Semiconductor integrated circuit device, and process and apparatus for (1999-06-08),
14. 5854508 - Semiconductor memory device having zigzag bonding pad arrangement (1998-12-29),
15. 5701031 - Sealed stacked arrangement of semiconductor devices (1997-12-23),

Title: Inventor Yasunori Yamaguchi

Introduction: Yasunori Yamaguchi is a renowned inventor based in Tokyo, Japan, known for his groundbreaking contributions to various technological fields.

Latest Patents: Yasunori Yamaguchi holds several patents in the areas of robotics, artificial intelligence, and renewable energy technologies, showcasing his innovative mindset and forward-thinking approach.

Career Highlights: With over two decades of experience in the industry, Yamaguchi has worked with leading research institutions and universities to develop cutting-edge solutions that have revolutionized the way we approach complex challenges.

Collaborations: Throughout his career, Yasunori Yamaguchi has collaborated with top companies, such as tech giants and innovative startups, to bring his inventions to the market and make a lasting impact on society.

Conclusion: Yasunori Yamaguchi's passion for innovation and his dedication to pushing the boundaries of technology have solidified his reputation as a visionary inventor in the global innovation landscape.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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