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For the Inventor, By the Inventor

Kodaira, Japan

Yasuhisa Shimazaki

This inventor holds 47 USPTO granted patents and 1 published patent application and 1 EPO patent, primarily in Semiconductor Technology. Top assignees: Renesas Electronics Corporation, Renesas Technology Corp., Hitachi, Ltd.. Active years: 1999-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasuhisa Shimazaki. Retrieved from https://idiyas.com/inventor/yasuhisa-shimazaki

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 47 

% Patents Active = 78.7

 

Average Co-Inventor Count = 3.7

ph-index = 12

Forward Citations = 401(Granted Patents)


Location History:

  • Tachikawa, JP (1999 - 2004)
  • Richmond, CA (US) (2004 - 2005)
  • Kanagawa, JP (2013 - 2015)
  • Kawasaki, JP (2015)
  • Kodaira, JP (2003 - 2019)
  • Tokyo, JP (2005 - 2020)

Company Filing History:

goldMedal26 out of 7,654 
 
Renesas Electronics Corporation
 patents
silverMedal12 out of 3,781 
 
Renesas Technology Corp.
 patents
bronzeMedal4 out of 42,731 
 
Hitachi, Ltd.
 patents
4. 1 out of 162 
 
Hitachi Engineering Co., Ltd.
 patents
5. 1 out of 87 
 
Hitachi Ulsi Engineering Corp.
 patents
6. 5 out of 834,513 
Other
 patents
where one patent can have more than one assignee

Years Active: 1999-2020

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Areas of Expertise:
Multiport Memory
Integrated Circuits
Memory Cell Array
Transistor Regions
Pulse Latch Circuit
Data Processing System
Storage Method
High-Speed Logic Gates
Low-Power Logic Gates
Microcomputer
Data Array Timing
Semiconductor Device
47 patents (USPTO):Explore Patents
1. 10566047 - Semiconductor device having multiport memory (2020-02-18),
2. 10483268 - Semiconductor device including memory cell array with transistors disposed in different active regions (2019-11-19),
3. 10304526 - Semiconductor integrated circuit device and system (2019-05-28),
4. 10224095 - Semiconductor device having multiport memory (2019-03-05),
5. 10096608 - Semiconductor device including memory cell array and power supply region (2018-10-09),
6. 10079055 - Semiconductor integrated circuit device and system (2018-09-18),
7. 9830975 - Semiconductor device having multiport memory (2017-11-28),
8. 9734893 - Semiconductor integrated circuit device and system (2017-08-15),
9. 9704873 - Semiconductor device including memory cell array with transistors disposed in different active regions (2017-07-11),
10. 9672872 - Semiconductor device having multiport memory (2017-06-06),
11. 9385133 - Semiconductor device including memory cell with transistors disposed in different active regions (2016-07-05),
12. 9378773 - Semiconductor device having multiport memory (2016-06-28),
13. 9368194 - Semiconductor integrated circuit device and system with memory cell array (2016-06-14),
14. 9196622 - Semiconductor device including memory cell array and power supply region (2015-11-24),
15. 9123435 - Semiconductor integrated circuit device (2015-09-01),

Title: Inventor Yasuhisa Shimazaki

Introduction: Yasuhisa Shimazaki is a renowned inventor based in Kodaira, Japan, known for his groundbreaking contributions to various technological fields.

Latest Patents: Yasuhisa Shimazaki holds several patents in the areas of robotics, artificial intelligence, and renewable energy technologies.

Career Highlights: With over two decades of experience in the innovation industry, Shimazaki has led numerous research projects that have resulted in cutting-edge inventions with real-world applications.

Collaborations: Throughout his career, Yasuhisa Shimazaki has collaborated with leading research institutions, universities, and tech companies to further advance the boundaries of technology and bring his inventions to the market.

Conclusion: Yasuhisa Shimazaki's dedication to innovation and his passion for creating solutions to complex problems have solidified his reputation as a pioneering inventor in the tech industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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