The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 2017
Filed:
Feb. 22, 2016
Renesas Electronics Corporation, Tokyo, JP;
Shigenobu Komatsu, Kodaira, JP;
Masanao Yamaoka, White Plains, NY (US);
Noriaki Maeda, Tachikawa, JP;
Masao Morimoto, Koganei, JP;
Yasuhisa Shimazaki, Kodaira, JP;
Yasuyuki Okuma, Hachioji, JP;
Toshiaki Sano, Tachikawa, JP;
Renesas Electronics Corporation, Tokyo, JP;
Abstract
A semiconductor integrated circuit which can respond to changes of the amount of retained data at the time of standby is provided. The semiconductor integrated circuit comprises a logic circuit (logic) and plural SRAM modules. The plural SRAM modules perform power control independently of the logic circuit, and an independent power control is performed among the plural SRAM modules. Specifically, one terminal and the other terminal of a potential control circuit of each SRAM module are coupled to a cell array and a local power line, respectively. The local power line of one SRAM module and the local power line of the other SRAM module share a shared local power line. A power switch of one SRAM module and a power switch of the other SRAM module are coupled in common to the shared local power line.