The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2016
Filed:
Sep. 18, 2014
Applicant:
Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;
Inventors:
Assignee:
RENESAS ELECTRONICS CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/02 (2006.01); G11C 7/10 (2006.01); G11C 8/16 (2006.01); G11C 11/412 (2006.01); G11C 11/413 (2006.01); H01L 27/02 (2006.01); H01L 27/11 (2006.01);
U.S. Cl.
CPC ...
G11C 5/02 (2013.01); G11C 7/1075 (2013.01); G11C 8/16 (2013.01); G11C 11/412 (2013.01); G11C 11/413 (2013.01); H01L 27/0207 (2013.01); H01L 27/11 (2013.01); H01L 27/1104 (2013.01);
Abstract
A semiconductor device enabling expansion of a noise margin. For example, in a memory area in which each memory cell MC is coupled to a word line WLA for a first port and a word line WLB for a second port, and a plurality of memory cells MC are disposed in a matrix shape, each word line is disposed in the order of WLA, WLB, WLB, WLA, WLA. Further, a pitch dbetween WLA-WLA and between WLB-WLB is made smaller than a pitch dbetween WLA-WLB. As such, the word lines of an identical port are disposed at the pitch don one of both sides of a certain word line and the word lines of different ports are disposed at the pitch don the other.