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San Jose, CA, United States of America

Vasudeva M Kamath

USPTO Granted Patents = 7

Average Co-Inventor Count = 2.5

ph-index = 2

Forward Citations = 16(Granted Patents)

Location History:

Sunnyvale, CA (US) (2018)
San Jose, CA (US) (2018 - 2021)

Company Filing History:

Altera Corporation

3 out of 54,726

Intel Corporation

Years Active: 2018-2021

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7 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10936772 - Methods for incremental circuit physical synthesis (2021-03-02),

2. 10922461 - Method and apparatus for performing rewind structural verification of retimed circuits driven by a plurality of clocks (2021-02-16),

3. 10489535 - Method and apparatus for reducing constraints during rewind structural verification of retimed circuits (2019-11-26),

4. 10296701 - Retiming with fixed power-up states (2019-05-21),

5. 10255404 - Retiming with programmable power-up states (2019-04-09),

6. 10162918 - Integrated circuit retiming with selective modeling of flip-flop secondary signals (2018-12-25),

7. 10157247 - Method and apparatus for performing rewind structural verification of retimed circuits driven by a plurality of clocks (2018-12-18),

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