The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2019
Filed:
Jun. 28, 2016
Altera Corporation, San Jose, CA (US);
Mahesh A. Iyer, Freemont, CA (US);
Vasudeva M. Kamath, San Jose, CA (US);
Robert Lawrence Walker, Boulder, CO (US);
Altera Corporation, San Jose, CA (US);
Abstract
A computer-implemented method includes performing retiming using a circuit design to determine a retimed variation to the circuit design. The circuit design includes a first set of registers with defined power-up states and the variations each comprise a second set of registers that correspond to the first set of registers. The method includes maintaining fixed power-up states for the second set of registers in the variations. The fixed power-up states for the second set of registers are equivalent to the defined power-up states of the first set of registers. The method includes identifying registers of the second set of registers involved in an initial state conflict, and performing a mitigating action to resolve the initial state conflict to enable retiming to continue while maintaining functionally equivalent behavior as the circuit design. Various choices of initial states are also explored during retiming to increase the effect of retiming.