Icheon-si, South Korea

Sang Hoon Shin

USPTO Granted Patents = 12 

Average Co-Inventor Count = 3.0

ph-index = 3

Forward Citations = 21(Granted Patents)


Location History:

  • Ichon-shi, KR (2012 - 2014)
  • Ichon-si, KR (2014)
  • Icheon-si, KR (2014 - 2016)
  • Cheongju-si, KR (2018)

Company Filing History:


Years Active: 2012-2018

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12 patents (USPTO):Explore Patents

Title: Innovations by Sang Hoon Shin

Introduction

Sang Hoon Shin is a prominent inventor based in Icheon-si, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 12 patents. His work focuses on improving wafer processing systems and semiconductor memory apparatuses.

Latest Patents

Among his latest patents is a "Wafer processing system and wafer processing method using same." This innovative system utilizes a wafer identification (ID) assigned by a wafer manufacturing company as an ID code for managing the wafer in semiconductor manufacturing. Another notable patent is the "Stack bank type semiconductor memory apparatus capable of improving alignment margin." This apparatus enhances the alignment margin for a bank while ensuring adequate space for forming a global input/output line. It features a stack bank structure with at least two sub-banks continuously stacked without disconnection of data signal lines, along with a control block that manages column-related signals of the sub-banks.

Career Highlights

Sang Hoon Shin is currently employed at SK Hynix Inc., a leading semiconductor company. His work has been instrumental in advancing technologies that are critical to the semiconductor industry.

Collaborations

He has collaborated with notable colleagues, including Seung Wook Kwak and Keun Soo Song, contributing to various innovative projects within the company.

Conclusion

Sang Hoon Shin's contributions to semiconductor technology through his patents and collaborations highlight his role as a key innovator in the field. His work continues to influence advancements in wafer processing and memory apparatus design.

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