The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Aug. 19, 2015
Applicant:

SK Hynix Inc., Icheon-si Gyeonggi-do, KR;

Inventors:

Seung Wook Kwak, Icheon-si, KR;

Sang Hoon Shin, Icheon-si, KR;

Keun Soo Song, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/02 (2006.01); G11C 8/10 (2006.01); G11C 7/10 (2006.01); G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
G11C 5/025 (2013.01); G11C 5/02 (2013.01); G11C 5/063 (2013.01); G11C 7/10 (2013.01); G11C 8/10 (2013.01);
Abstract

A semiconductor memory apparatus is capable of improving the alignment margin for a bank and sufficiently ensuring a space for forming a global input/output line. The semiconductor memory apparatus includes a stack bank structure having at least two sub-banks continuously stacked without disconnection of data signal lines, and a control block arranged at one side of the stack bank structure to simultaneously control column-related signals of the sub-banks.


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