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For the Inventor, By the Inventor

San Jose, CA, United States of America

Samit S Sengupta

This inventor holds 17 USPTO granted patents, primarily in Semiconductor Devices. Top assignees: Altera Corporation, Philips Electronics North America Corporation, Vlsi Technology, Inc.. Active years: 1999-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Samit S Sengupta. Retrieved from https://idiyas.com/inventor/samit-s-sengupta

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 17

% Patents Active = 82.4

Average Co-Inventor Count = 2.0

ph-index = 8

Forward Citations = 167(Granted Patents)


Company Filing History:

goldMedal4 out of 4,335 
 
Altera Corporation
 patents
silverMedal4 out of 838 
 
Philips Electronics North America Corporation
 patents
bronzeMedal4 out of 1,083 
 
Vlsi Technology, Inc.
 patents
4. 3 out of 21,919 
 
Koninklijke Philips Corporation N.v.
 patents
5. 1 out of 17 
 
Philips Semiconductor, Inc.
 patents
6. 1 out of 26 
 
Philips Semiconductors Inc.
 patents

Years Active: 1999-2012

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Areas of Expertise:
Electrostatic Discharge
Integrated Circuits
Interconnect Metallization
Chemical-Mechanical Planarization
Temperature Compensation
Metal Etch Process
Conductive Via
Deep Submicron Vias
Threshold-Voltage Drift
Isolation Oxide
Process Flexibility
Anti-Reflective Structure
17 patents (USPTO):Explore Patents
1. 8217457 - Electrostatic discharge (ESD) protection device for use with multiple I/O standards (2012-07-10),
2. 7468617 - Electrostatic discharge (ESD) protection device for use with multiple I/O standards (2008-12-23),
3. 7286020 - Techniques for monitoring and replacing circuits to maintain high performance (2007-10-23),
4. 6933869 - Integrated circuits with temperature-change and threshold-voltage drift compensation (2005-08-23),
5. 6459153 - Compositions for improving interconnect metallization performance in integrated circuits (2002-10-01),
6. 6433433 - Semiconductor device with misaligned via hole (2002-08-13),
7. 6413152 - Apparatus for performing chemical-mechanical planarization with improved process window, process flexibility and cost (2002-07-02),
8. 6410421 - Semiconductor device with anti-reflective structure and methods of manufacture (2002-06-25),
9. 6255226 - Optimized metal etch process to enable the use of aluminum plugs (2001-07-03),
10. 6235609 - Method for forming isolation areas with improved isolation oxide (2001-05-22),
11. 6228757 - Process for forming metal interconnects with reduced or eliminated metal recess in vias (2001-05-08),
12. 6207565 - Integrated process for ashing resist and treating silicon after masked spacer etch (2001-03-27),
13. 6176983 - Methods of forming a semiconductor device (2001-01-23),
14. 6162586 - Method for substantially preventing footings in chemically amplified (2000-12-19),
15. 6146996 - Semiconductor device with conductive via and method of making same (2000-11-14),

Title: The Innovations of Samit S. Sengupta

Introduction

Samit S. Sengupta is a prominent inventor based in San Jose, California. He has made significant contributions to the field of electrostatic discharge (ESD) protection devices, holding a total of 17 patents. His work has been instrumental in advancing technology standards across various applications.

Latest Patents

One of his latest patents focuses on an electrostatic discharge (ESD) protection device designed for use with multiple I/O standards. This invention includes a protection circuit that comprises a plurality of input circuits. Each input circuit features a first PMOS and a first NMOS transistor connected in series between a power supply and ground. Additionally, first and second inverters are connected to the gates of these transistors. The design ensures that the ratio of the width of the gate of the second NMOS transistor to the width of the gate of the first NMOS transistor remains consistent across all input circuits. Another aspect of this invention involves a multi-fingered gate transistor formed in a first well of one conductivity type, surrounded by a second well of the same type, enhancing the resistance of the substrate current path.

Career Highlights

Throughout his career, Samit has worked with notable companies such as Altera Corporation and VLSI Technology, Inc. His experience in these organizations has allowed him to refine his skills and contribute to groundbreaking innovations in the field of electronics.

Collaborations

Samit has collaborated with several talented individuals, including Subhas Bothra and Hugh Sungki O. These partnerships have fostered a creative environment that has led to the development of innovative solutions in technology.

Conclusion

Samit S. Sengupta's contributions to the field of electrostatic discharge protection devices highlight his expertise and dedication to innovation. His patents and collaborations reflect a commitment to advancing technology standards, making him a significant figure in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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