The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2001

Filed:

Mar. 05, 1998
Applicant:
Inventors:

Samit Sengupta, San Jose, CA (US);

Tammy Zheng, San Jose, CA (US);

Assignee:

Philips Semiconductors, Inc., Tarrytown, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ; H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/14763 ; H01L 2/144 ;
Abstract

A process for manufacturing a semiconductor device having metal interconnects reduces or eliminates the recessing of metal in the vias, particularly when the metal in the vias is aluminum or an aluminum alloy. The process includes forming a via in a device layer of the semiconductor device. A barrier layer is formed over the device layer and a metal layer is formed over the barrier layer. The metal layer also fills the via to form a via structure. A portion of the metal layer is then removed and a remaining portion of the metal layer forms a conductive structure having a sidewall extending from a surface of the barrier layer. A spacer is formed along the sidewall of the conductive structure and a portion of the barrier layer is removed using the spacer to protect the via structure adjacent the surface of the device layer. In particular, the spacer protects a portion of the via structure that does not overlap with the conductive structure.


Find Patent Forward Citations

Loading…