Mount Kisco, NY, United States of America

Richard Andre Wachnik

This inventor holds 20 USPTO granted patents and 4 published patent applications, primarily in Integrated Circuits. Top assignees: International Business Machines Corporation, Globalfoundries Inc.. Active years: 2000-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Richard Andre Wachnik. Retrieved from https://idiyas.com/inventor/richard-andre-wachnik

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 20 

% Patents Active = 70.0

Average Co-Inventor Count = 4.9

ph-index = 8

Forward Citations = 302(Granted Patents)


Location History:

  • Putnam County, NY (US) (2000)
  • Brewster, NY (US) (2000 - 2001)
  • Mt. Kisco, NY (US) (2003)
  • Hopewell Junction, NY (US) (2012 - 2014)
  • Mount Kisco, NY (US) (2001 - 2023)

Company Filing History:


Years Active: 2000-2026

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Areas of Expertise:
Peltier Cooling
Dual Damascene
Integrated Circuits
Electromigration Resistance
Voltage Island
Trench Capacitor
Body Contacts
SRAM Memories
Signal Transmission
Copper Interconnections
Logic-Clock-Buffers
Alpha Particle Shield
20 patents (USPTO):Explore Patents

Title: The Innovative Journey of Richard Andre Wachnik

Introduction: Richard Andre Wachnik, hailing from Mount Kisco, NY, is a prominent inventor with an impressive portfolio of 19 patents. His contributions to the field of semiconductor technology and circuit design have significantly impacted the industry, showcasing his creativity and engineering expertise.

Latest Patents: Wachnik's latest innovations include two noteworthy patents. The first, titled "Latch-up avoidance for sea-of-gates," outlines systems and methods for implementing a CMOS circuit design utilizing a sea-of-gates fill methodology to prevent latch-up occurrences. This invention involves identifying a fill cell within the circuit, which contains a power rail, a ground rail, and a field-effect transistor (FET). By disconnecting the via from the power rail and repositioning it to a different node, Wachnik's method successfully decouples the source or drain from the well, thus preventing latch-up while preserving via and metal shape density.

His second significant patent, "Integrated circuits with Peltier cooling provided by back-end wiring," describes a semiconductor structure featuring multiple semiconductor devices, each equipped with various electrical connections. This design cleverly incorporates first conductors made from materials with a positive Seebeck coefficient and second conductors from materials with a negative Seebeck coefficient, enabling effective heat management by conducting current and dissipating heat simultaneously.

Career Highlights: Throughout his career, Wachnik has worked with leading companies, most notably IBM and Globalfoundries Inc. His tenure at these organizations has enabled him to refine his inventiveness and apply his research to practical applications, paving the way for groundbreaking advancements in semiconductor technology.

Collaborations: During his professional journey, Richard has collaborated with talented individuals such as Hazara Singh Rathore and Du Binh Nguyen. Together, they have fostered an environment of innovation, leading to the development of technologies that enhance the efficiency and performance of electronic systems.

Conclusion: Richard Andre Wachnik’s impressive patent portfolio and contributions to the semiconductor industry highlight his status as an inventive force in technology. His latest patents showcase not only his technical prowess but also his ability to address crucial challenges in circuit design and heat management, ensuring he remains a significant contributor to the field. As technology continues to evolve, Wachnik's work will undoubtedly continue to inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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