The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 2011
Filed:
Jun. 02, 2008
Bruce Balch, Saranac, NY (US);
Nazmul Habib, South Burlington, VT (US);
Susan K. Lichtensteiger, Essex Junction, VT (US);
Daniel L. Stasiak, Austin, TX (US);
Richard A. Wachnik, Mount Kisco, NY (US);
Bruce Balch, Saranac, NY (US);
Nazmul Habib, South Burlington, VT (US);
Susan K. Lichtensteiger, Essex Junction, VT (US);
Daniel L. Stasiak, Austin, TX (US);
Richard A. Wachnik, Mount Kisco, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method is provided for characterizing performance of a chip having at least one voltage island and at least one performance screen ring oscillator (PSRO). An on-chip performance monitor (OCPM) is incorporated on the voltage island. Performance measurements of the voltage island are generated with only the voltage island under power. Performance measurements of the performance screen ring oscillator (PSRO) are generated with only the voltage island under power. Performance measurements of the performance screen ring oscillator (PSRO) is compared to the performance measurements of the on-chip performance monitor (OCPM) to determine a systematic offset due to the voltage island. Performance models are adjusted using the systematic offset due to the voltage island.