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For the Inventor, By the Inventor

Cupertino, CA, United States of America

Rambabu Pyapali

This inventor holds 9 USPTO granted patents. Top assignees: Sun Microsystems, Inc., Oracle America, Inc., Oracle International Corporation. Active years: 2002-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Rambabu Pyapali. Retrieved from https://idiyas.com/inventor/rambabu-pyapali

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 9

% Patents Active = 100.0

Average Co-Inventor Count = 4.8

ph-index = 4

Forward Citations = 52(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2002 - 2004)
  • Cupertino, CA (US) (2005 - 2014)

Company Filing History:

goldMedal7 out of 7,642 
 
Sun Microsystems, Inc.
 patents
silverMedal1 out of 1,928 
 
Oracle America, Inc.
 patents
bronzeMedal1 out of 11,901 
 
Oracle International Corporation
 patents

Years Active: 2002-2014

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9 patents (USPTO):Explore Patents
1. 8810280 - Low leakage spare gates for integrated circuits (2014-08-19),
2. 7890909 - Automatic block composition tool for composing custom blocks having non-standard library cells in an integrated circuit design flow (2011-02-15),
3. 7484193 - Method and software for predicting the timing delay of a circuit path using two different timing models (2009-01-27),
4. 7036096 - Estimating capacitances using information including feature sizes extracted from a netlist (2006-04-25),
5. 7007256 - Method and apparatus for power consumption analysis in global nets (2006-02-28),
6. 6954914 - Method and apparatus for signal electromigration analysis (2005-10-11),
7. 6779131 - Reconfigurable multi-chip modules (2004-08-17),
8. 6596563 - Method for double-layer implementation of metal options in an integrated chip for efficient silicon debug (2003-07-22),
9. 6396149 - Method for double-layer implementation of metal options in an integrated chip for efficient silicon debug (2002-05-28),

Title: Rambabu Pyapali: Innovator in Integrated Circuit Design

Introduction

Rambabu Pyapali is a notable inventor based in Cupertino, CA, with a focus on innovations in integrated circuit design. He holds a total of 9 patents, showcasing his contributions to the field of electronics and circuit engineering.

Latest Patents

Among his latest patents, Rambabu has developed a technology for low leakage spare gates in integrated circuits. This invention addresses the issue of current leakage by incorporating a spare gate with a disconnected discharge path. Additionally, he has created an automatic block composition tool that facilitates the design of custom blocks using non-standard library cells. This tool streamlines the process by generating a placement control file and instantiating leafcells for both standard and non-standard library cells, enhancing the efficiency of integrated circuit design.

Career Highlights

Rambabu has had a distinguished career, working with prominent companies such as Sun Microsystems, Inc. and Oracle America, Inc. His experience in these organizations has significantly contributed to his expertise in integrated circuit technologies.

Collaborations

Throughout his career, Rambabu has collaborated with talented individuals, including Peter F. Lai and Aveek Sarkar. These partnerships have likely enriched his work and led to innovative solutions in the field.

Conclusion

Rambabu Pyapali's contributions to integrated circuit design through his patents and career achievements highlight his role as a significant innovator in the technology sector. His work continues to influence advancements in electronic design and engineering.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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