The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2006
Filed:
Mar. 06, 2003
Aveek Sarkar, Mountain View, CA (US);
Shyam Sundar, Sunnyvale, CA (US);
Peter F. Lai, San Jose, CA (US);
Rambabu Pyapali, Cupertino, CA (US);
Aveek Sarkar, Mountain View, CA (US);
Shyam Sundar, Sunnyvale, CA (US);
Peter F. Lai, San Jose, CA (US);
Rambabu Pyapali, Cupertino, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
The present invention describes a method and an apparatus for determining switching power consumption of global devices (e.g., repeaters, flops or the like) in an integrated circuit design during high-level design phase after the global routing for the integrated circuit is available. The clock cycle is divided into various timing intervals and the timing reports are generated for each cycle to determine a time-domain staggered distribution of each device's switching activity within a given timing interval. Each device's switching activity is analyzed within the given timing interval (or segment thereof). The power consumption is determined for each device that switches in the given timing interval.