The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2011
Filed:
Jan. 02, 2008
Rambabu Pyapali, Cupertino, CA (US);
Peter F. Lai, San Jose, CA (US);
Ju H. Yew, San Jose, CA (US);
Xi-an Xu, Cupertino, CA (US);
Xiaochun Gao, San Jose, CA (US);
Rambabu Pyapali, Cupertino, CA (US);
Peter F. Lai, San Jose, CA (US);
Ju H. Yew, San Jose, CA (US);
Xi-An Xu, Cupertino, CA (US);
Xiaochun Gao, San Jose, CA (US);
Oracle America, Inc., Redwood City, CA (US);
Abstract
An automatic custom block composition tool for composing custom blocks of an integrated circuit (IC) design that may include non-standard library cells. The tool includes program instructions that are executable to create and use a placement control file that includes instructions for use by the custom block composition tool to place the one or more non-standard library cells into the custom block layout. In addition, the program instructions may instantiate a leafcell for each non-standard and each standard library cell included in a netlist. The program instructions may access the placement control file and place each leafcell in a row of the custom block layout according to the placement control file. The program instructions may also pre-route power, clock and critical network signals, and generate a router control file used during remaining routing of the custom block by a conventional router tool.