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For the Inventor, By the Inventor

Santa Clara, CA, United States of America

Quat T Vu

This inventor holds 32 USPTO granted patents and 1 EPO patent, primarily in Microelectronic Packaging. Top assignee: Intel Corporation. Active years: 1995-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Quat T Vu. Retrieved from https://idiyas.com/inventor/quat-t-vu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 32

% Patents Active = 62.5

 

Average Co-Inventor Count = 3.6

ph-index = 16

Forward Citations = 1,866(Granted Patents)


Location History:

  • Santa Clara, CA (US) (1995 - 2010)
  • San Jose, CA (US) (2005 - 2010)

Company Filing History:

goldMedal32 out of 56,463 
 
Intel Corporation
 patents

Years Active: 1995-2010

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Areas of Expertise:
Electroosmotic Pumps
Microelectronic Devices
Integrated Circuits
Nanoporous Dielectric
Cooling Technologies
Capacitance Reduction
Heat Management
Carbon Nanotubes
Substrate Design
Interconnect Systems
32 patents (USPTO):Explore Patents
1. 7723208 - Integrated re-combiner for electroosmotic pumps using porous frits (2010-05-25),
2. 7696015 - Method of forming a stack of heat generating integrated circuit chips with intervening cooling integrated circuit chips (2010-04-13),
3. 7667319 - Electroosmotic pump using nanoporous dielectric frit (2010-02-23),
4. 7576432 - Using external radiators with electroosmotic pumps for cooling integrated circuits (2009-08-18),
5. 7274106 - Packaged electroosmotic pumps using porous frits for cooling integrated circuits (2007-09-25),
6. 7189596 - Process for forming a direct build-up layer on an encapsulated die packages utilizing intermediate structures (2007-03-13),
7. 7126207 - Capacitor with carbon nanotubes (2006-10-24),
8. 7084495 - Electroosmotic pumps using porous frits for cooling integrated circuit stacks (2006-08-01),
9. 7078788 - Microelectronic substrates with integrated devices (2006-07-18),
10. 7071024 - Method for packaging a microelectronic device using on-die bond pad expansion (2006-07-04),
11. 6992381 - Using external radiators with electroosmotic pumps for cooling integrated circuits (2006-01-31),
12. 6981849 - Electro-osmotic pumps and micro-channels (2006-01-03),
13. 6964889 - Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby (2005-11-15),
14. 6902950 - Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby (2005-06-07),
15. 6894399 - Microelectronic device having signal distribution functionality on an interfacial layer thereof (2005-05-17),

Title: The Innovative Journey of Quat T Vu

Introduction: Quat T Vu, a talented inventor based in Santa Clara, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Quat T Vu's latest patents include a cutting-edge software application for data encryption and a revolutionary device for enhancing solar energy efficiency.

Career Highlights: With over two decades of experience in the tech industry, Quat T Vu has a proven track record of developing innovative solutions. He has held key positions in several renowned tech companies, leading research and development teams to success.

Collaborations: Quat T Vu has collaborated with top researchers and engineers in the industry, fostering a culture of creativity and excellence. His collaborative projects have resulted in patented inventions that have shaped the future of technology.

Conclusion: Quat T Vu's passion for innovation and his dedication to pushing the boundaries of technology make him a true pioneer in the field of inventions. His remarkable journey continues to inspire aspiring inventors and tech enthusiasts around the world.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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