Partha Das

Title: Partha Das: Innovator in Integrated Circuit Design

Introduction

Partha Das is a notable inventor based in Kolkata, India, recognized for his contributions to integrated circuit (IC) design. With a total of 3 patents, he has made significant strides in optimizing power consumption and enhancing the efficiency of clock-gated circuitry.

Latest Patents

One of his latest patents is titled "Multi-level clock gating circuitry transformation." This method focuses on optimizing clock-gated circuitry in IC design by determining a plurality of signals that feed into enable inputs of various clock gates. The invention identifies shared combinational logic among these signals and transforms the clock-gated circuitry into multiple levels of clock-gating circuitry based on this shared logic. Another significant patent is "Method for automatic clock gating to save power." This power optimization method derives gated circuitry in a synthesized netlist of an IC design. It identifies idle candidate blocks and clusters sub-blocks on the chip to determine an optimized clock gating structure for power savings.

Career Highlights

Partha Das has worked with prominent companies in the field, including Magma Design Automation, Inc. and Synopsys, Inc. His experience in these organizations has contributed to his expertise in integrated circuit design and power optimization techniques.

Collaborations

Some of his notable coworkers include Yunjian (William) Jiang and Arvind Srinivasan, who have collaborated with him on various projects in the field of IC design.

Conclusion

Partha Das stands out as an innovator in the realm of integrated circuit design, with a focus on power optimization and efficiency. His contributions through patents and collaborations highlight his impact on the industry.