Yokohama, Japan

Nobuaki Ohtsuka

This inventor holds 22 USPTO granted patents, primarily in Nonvolatile Semiconductor Memory. Top assignee: Kabushiki Kaisha Toshiba. Active years: 1987-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Nobuaki Ohtsuka. Retrieved from https://idiyas.com/inventor/nobuaki-ohtsuka

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.9

ph-index = 10

Forward Citations = 312(Granted Patents)


Location History:

  • Yokohama, JP (1987 - 1994)
  • Kawasaki, JP (1995 - 1999)

Company Filing History:


Years Active: 1987-1999

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Areas of Expertise:
Nonvolatile Memory
Semiconductor Memory
Integrated Circuit
Bias Voltage Circuit
EEPROM Device
High-Speed Write
Delay Circuit
Stress Test Circuit
Redundant Memory
Output Buffer
Cell Array Layout
Reference Potential
22 patents (USPTO):Explore Patents

Title: **Innovative Contributions of Nobuaki Ohtsuka in Semiconductor Technology**

Introduction

Nobuaki Ohtsuka is a prominent inventor based in Yokohama, Japan, known for his significant contributions to semiconductor memory technology. With 22 patents to his name, Ohtsuka has played an essential role in advancing the capabilities and efficiency of nonvolatile semiconductor memory devices.

Latest Patents

Ohtsuka's recent patents showcase his innovative approaches to memory technology. One of his latest inventions is a **Nonvolatile Semiconductor Memory with a Protect Circuit**. This invention introduces a plurality of erase circuits for various memory blocks, which are connected to protect circuits. The protect circuits generate protect signals that determine whether they are set in a protect mode. This innovation allows for determining the status of the protect circuits without the need to erase or write data in the memory cell array.

Another notable patent by Ohtsuka is the development of a **Semiconductor Memory Device having a Delay Circuit for Controlling**. In this invention, a memory cell array is integrated with column and row selection lines managed by respective decoders. A delay circuit in the first-stage column decoder ensures that pulses from the address signal transition correctly, allowing for efficient data latching in the sense amplifier.

Career Highlights

Ohtsuka's career is marked by significant achievements while working at Kabushiki Kaisha Toshiba. His dedication to innovation in semiconductor technology has not only earned him a series of patents but also respected recognition among his peers in the industry.

Collaborations

Throughout his career, Ohtsuka has collaborated with other talented engineers such as Sumio Tanaka and Junichi Miyamoto. Together, they have contributed to the advancement of technology within Toshiba and beyond, further solidifying Toshiba's position as a leader in semiconductor innovation.

Conclusion

Nobuaki Ohtsuka's innovative work in semiconductor memory technology illustrates the impact of inventive minds in technological advancement. His recent patents reflect a commitment to improving memory device capabilities, ensuring that state-of-the-art solutions continue to evolve within the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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