Leuven, Belgium

Naoto Horiguchi

This inventor holds 18 USPTO granted patents and 11 published patent applications and 12 EPO patents, primarily in Field Effect Transistors. Top assignees: Imec Vzw, Katholieke Universiteit Leuven, Vrije Universiteit Brussel. Active years: 2015-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naoto Horiguchi. Retrieved from https://idiyas.com/inventor/naoto-horiguchi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 18 

% Patents Active = 83.3

 

Average Co-Inventor Count = 3.9

ph-index = 3

Forward Citations = 25(Granted Patents)


Company Filing History:


Years Active: 2015-2026

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Areas of Expertise:
Field-Effect Transistor
FET Device
Stacked Transistor
Metallization Process
Semiconductor Devices
Nanosheet
Vertical Transistor
Hot Carrier Injection
FinFET
Self-Aligned Contacts
Channel Structure
Integrated Circuit
18 patents (USPTO):Explore Patents

Title: Naoto Horiguchi: Innovator in Stacked Transistor Technology

Introduction

Naoto Horiguchi is a prominent inventor based in Leuven, Belgium. He has made significant contributions to the field of semiconductor technology, particularly in the development of stacked transistor devices. With a total of 18 patents to his name, Horiguchi's work is at the forefront of innovation in this area.

Latest Patents

Horiguchi's latest patents include a method for forming a stacked transistor device. This method involves creating a fin structure that comprises a lower device sub-stack with lower channel nanosheets, a middle insulating layer, and an upper device sub-stack with an upper channel layer. The process also includes forming a gate structure and source and drain regions for both the lower channel nanosheets and the upper channel fins. Another notable patent is a method for forming a stacked field-effect transistor device, which details the steps for creating a bottom FET device and a top FET device, including the formation of a bonding layer and various etching processes.

Career Highlights

Throughout his career, Naoto Horiguchi has worked with esteemed organizations such as Imec Vzw and Vrije Universiteit Brussel. His experience in these institutions has allowed him to collaborate on cutting-edge research and development projects, further enhancing his expertise in semiconductor technologies.

Collaborations

Horiguchi has collaborated with notable colleagues, including Julien Ryckaert and Eugenio Dentoni Litta. These partnerships have contributed to the advancement of innovative solutions in the field of stacked transistor technology.

Conclusion

Naoto Horiguchi's contributions to the field of semiconductor technology through his innovative patents and collaborations highlight his role as a leading inventor. His work continues to influence advancements in stacked transistor devices, showcasing the importance of innovation in this rapidly evolving industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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