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For the Inventor, By the Inventor

Hsinchu, Taiwan

Nai Hua Yeh

This inventor holds 8 USPTO granted patents. Top assignees: Kingpak Technology Inc., Other. Active years: 2002-2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Nai Hua Yeh. Retrieved from https://idiyas.com/inventor/nai-hua-yeh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8

% Patents Active = 87.5

Average Co-Inventor Count = 4.6

ph-index = 5

Forward Citations = 150(Granted Patents)


Location History:

  • Hsinchu Hsien, TW (2002 - 2003)
  • Chupei, Hsinchu Hsien, TW (2003)

Company Filing History:

goldMedal5 out of 81 
 
Kingpak Technology Inc.
 patents
silverMedal3 out of 834,570 
Other
 patents

Years Active: 2002-2003

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8 patents (USPTO):Explore Patents
1. 6642554 - Memory module structure (2003-11-04),
2. 6642137 - Method for manufacturing a package structure of integrated circuits (2003-11-04),
3. 6627983 - Stacked package structure of image sensor (2003-09-30),
4. 6565008 - Module card and a method for manufacturing the same (2003-05-20),
5. 6559539 - Stacked package structure of image sensor (2003-05-06),
6. 6501187 - Semiconductor package structure having central leads and method for packaging the same (2002-12-31),
7. 6472736 - Stacked structure for memory chips (2002-10-29),
8. 6400007 - Stacked structure of semiconductor means and method for manufacturing the same (2002-06-04),

Title: Nai Hua Yeh: Innovator in Integrated Circuit Packaging

Introduction

Nai Hua Yeh is a prominent inventor based in Hsinchu Hsien, Taiwan. He has made significant contributions to the field of integrated circuit packaging, holding a total of 8 patents. His innovative designs and methods have advanced the technology used in memory modules and integrated circuits.

Latest Patents

One of his latest patents is a method for manufacturing a package structure of integrated circuits. This package structure includes a substrate, an integrated circuit, an adhesive layer, a plurality of wirings, and a glue layer. The substrate features a first surface with signal input terminals and a second surface with signal output terminals for electrical connection to a circuit board. The integrated circuit has recesses on its lower surface and bonding pads on its upper surface. The adhesive layer adheres the integrated circuit to the substrate, while the wirings connect the bonding pads to the signal input terminals. This innovative structure effectively addresses the issue of overflowed glue in integrated circuits. Another notable patent is a memory module structure designed for assembly on a locking device. This structure includes a substrate and multiple memories, arranged to maximize memory capacity.

Career Highlights

Nai Hua Yeh has worked with Kingpak Technology Inc., where he has applied his expertise in integrated circuit technology. His work has been instrumental in developing advanced packaging solutions that enhance the performance and reliability of electronic devices.

Collaborations

Throughout his career, Nai Hua Yeh has collaborated with notable professionals in the field, including Chen Pin Peng and Jichen Wu. These collaborations have contributed to the advancement of technology in integrated circuits and memory modules.

Conclusion

Nai Hua Yeh's contributions to the field of integrated circuit packaging are noteworthy. His innovative patents and career achievements reflect his dedication to advancing technology in this critical area. His work continues to influence the development of electronic devices worldwide.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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