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For the Inventor, By the Inventor

Poughkeepsie, NY, United States of America

Munir D Naeem

USPTO Granted Patents = 23


Average Co-Inventor Count = 3.1

ph-index = 6

Forward Citations = 143(Granted Patents)


Location History:

  • Poughkeesie, NY (US) (2002 - 2004)
  • Poughkeepsie, NY (US) (1998 - 2014)

Company Filing History:

goldMedal20 out of 164,108 
 
International Business Machines Corporation
 patents
silverMedal3 out of 14,705 
 
Infineon Technologies Ag
 patents
bronzeMedal2 out of 30,028 
 
Siemens Aktiengesellschaft
 patents
4. 2 out of 52,711 
 
Kabushiki Kaisha Toshiba
 patents
5. 2 out of 832,680 
Other
 patents
where one patent can have more than one assignee

Years Active: 1998-2014

where 'Filed Patents' based on already Granted Patents

23 patents (USPTO):
1. 8772850 - Embedded DRAM memory cell with additional patterning layer for improved strap formation (2014-07-08),
2. 8492821 - Enhanced capacitance trench capacitor (2013-07-23),
3. 8426268 - Embedded DRAM memory cell with additional patterning layer for improved strap formation (2013-04-23),
4. 8227311 - Method of forming enhanced capacitance trench capacitor (2012-07-24),
5. 8003488 - Shallow trench isolation structure compatible with SOI embedded DRAM (2011-08-23),
6. 7871893 - Method for non-selective shallow trench isolation reactive ion etch for patterning hybrid-oriented devices compatible with high-performance highly-integrated logic devices (2011-01-18),
7. 7592245 - Poly filled substrate contact on SOI structure (2009-09-22),
8. 7393738 - Subground rule STI fill for hot structure (2008-07-01),
9. 7358172 - Poly filled substrate contact on SOI structure (2008-04-15),
10. 6893938 - STI formation for vertical and planar transistors (2005-05-17),
11. 6890815 - Reduced cap layer erosion for borderless contacts (2005-05-10),
12. 6821900 - Method for dry etching deep trenches in a substrate (2004-11-23),
13. 6733602 - Polycrystalline material with surface features projecting from a surface thereof (2004-05-11),
14. 6566219 - Method of forming a self aligned trench in a semiconductor using a patterned sacrificial layer for defining the trench opening (2003-05-20),
15. 6555204 - Method of preventing bridging between polycrystalline micro-scale features (2003-04-29),

Title: Munir D Naeem: A Visionary Inventor from Poughkeepsie

Introduction: Munir D Naeem is a distinguished inventor hailing from Poughkeepsie, NY. His innovative spirit and dedication to technological advancements have made him a prominent figure in the world of patents and inventions.

Latest Patents: Munir D Naeem holds several groundbreaking patents in various fields, including technology, engineering, and healthcare. His recent patents focus on renewable energy solutions and sustainable development.

Career Highlights: With a career spanning over two decades, Munir D Naeem has worked with leading research institutions and companies to bring his inventions to life. His contributions have significantly impacted the way we approach modern challenges.

Collaborations: Throughout his career, Munir D Naeem has collaborated with top-tier universities, innovative companies, and talented individuals to push the boundaries of innovation. His collaborative efforts have led to the development of cutting-edge technologies.

Conclusion: Munir D Naeem's passion for innovation and his relentless pursuit of excellence have solidified his position as a trailblazer in the world of inventions. His work continues to inspire future generations of inventors and researchers.

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