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Min-Hsiu Tsai

This inventor holds 13 USPTO granted patents and 1 published patent application. Top assignees: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Comp. Ltd., National Taiwan University. Active years: 2013-2025.

USPTO Granted Patents = 13 (Patent Applications = 1)

% Patents Active = 100.0

Average Co-Inventor Count = 2.2

ph-index = 1

Forward Citations = 1(Granted Patents)

Location History:

Zhubei, TW (2013)
Hsinchu County, TW (2013)
Hsinchu, TW (2016 - 2023)

Company Filing History:

12 out of 244

Global Unichip Corporation

patents

9 out of 42,759

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

1 out of 1,391

National Taiwan University

patents

4. 1 out of 834,411

Other

patents

where one patent can have more than one assignee

Years Active: 2013-2025

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13 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12400065 - Capture IR drop analyzer and analyzing method thereof (2025-08-26),

2. 11630479 - Apparatus for adjusting skew of circuit signal and adjusting method thereof (2023-04-18),

3. 11256838 - Establishing method for timing model (2022-02-22),

4. 11182524 - Fixing device for clock tree and fixing method thereof (2021-11-23),

5. 10909291 - Circuit correction system and method for increasing coverage of scan test (2021-02-02),

6. 10817633 - Timing model, timing model building method, and related top-level analysis method (2020-10-27),

7. 10614260 - Model-building method for building top interface logic model (2020-04-07),

8. 10311185 - Model-building method and model-building system (2019-06-04),

9. 9710580 - Timing analysis method for digital circuit design and system thereof (2017-07-18),

10. 9246488 - Low leakage boundary scan device design and implementation (2016-01-26),

11. 8487645 - Through silicon via testing structure (2013-07-16),

12. 8473793 - Low leakage boundary scan device design and implementation (2013-06-25),

13. 8468407 - Method for creating test clock domain during integrated circuit design, and associated computer readable medium (2013-06-18),

Title: Min-Hsiu Tsai: Innovator in Circuit Design and Analysis

Introduction

Min-Hsiu Tsai is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of circuit design and analysis, holding a total of 13 patents. His innovative work focuses on improving the efficiency and accuracy of circuit layouts and signal processing.

Latest Patents

Among his latest patents are the "Capture IR Drop Analyzer and Analyzing Method Thereof" and the "Apparatus for Adjusting Skew of Circuit Signal and Adjusting Method Thereof." The capture IR drop analyzer patent provides a method for analyzing circuit layout information and package model information to identify critical circuit blocks. This method enhances the design structure by analyzing clock tree architecture. The apparatus for adjusting skew of circuit signal focuses on dividing circuits into partitions and adjusting skew values based on adjacent states, thereby improving signal integrity.

Career Highlights

Min-Hsiu Tsai has worked with notable companies such as Global Unichip Corporation and Taiwan Semiconductor Manufacturing Company. His experience in these organizations has allowed him to develop and refine his innovative ideas in circuit design.

Collaborations

Throughout his career, Min-Hsiu Tsai has collaborated with talented individuals, including Hsin-Hsiung Liao and Chen-Yuan Kao. These collaborations have contributed to the advancement of technology in the semiconductor industry.

Conclusion

Min-Hsiu Tsai's contributions to circuit design and analysis through his patents and collaborations highlight his role as an influential inventor in the field. His work continues to impact the industry positively.

Profile summary based on public USPTO records.

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