IDiyas

For the Inventor, By the Inventor

Wappingers Falls, NY, United States of America

Mihel Seitz

USPTO Granted Patents = 18


Average Co-Inventor Count = 2.6

ph-index = 7

Forward Citations = 334(Granted Patents)


Location History:

  • Dresden, DE (2004)
  • Wappingers Falls, NY (US) (2001 - 2005)
  • Radebeul, DE (2004 - 2006)

Company Filing History:

goldMedal11 out of 14,705 
 
Infineon Technologies Ag
 patents
silverMedal3 out of 164,108 
 
International Business Machines Corporation
 patents
bronzeMedal1 out of 244 
 
Infineon Technologies North America Corp.
 patents
4. 1 out of 106 
 
Infineon Technologies LLC
 patents
5. 2 out of 832,680 
Other
 patents

Years Active: 2001-2006

where 'Filed Patents' based on already Granted Patents

18 patents (USPTO):
1. 7105404 - Method for fabricating a semiconductor structure (2006-09-12),
2. 7034352 - DRAM with very shallow trench isolation (2006-04-25),
3. 6960514 - Pitcher-shaped active area for field effect transistor and method of forming same (2005-11-01),
4. 6849496 - DRAM with vertical transistor and trench capacitor memory cells and method of fabrication (2005-02-01),
5. 6812092 - Method for fabricating transistors having damascene formed gate contacts and self-aligned borderless bit line contacts (2004-11-02),
6. 6794282 - Three layer aluminum deposition process for high aspect ratio CL contacts (2004-09-21),
7. 6759292 - Method for fabricating a trench capacitor (2004-07-06),
8. 6746933 - Pitcher-shaped active area for field effect transistor and method of forming same (2004-06-08),
9. 6724054 - Self-aligned contact formation using double SiN spacers (2004-04-20),
10. 6716734 - Low temperature sidewall oxidation of W/WN/poly-gatestack (2004-04-06),
11. 6706634 - Control of separation between transfer gate and storage node in vertical DRAM (2004-03-16),
12. 6667223 - High aspect ratio high density plasma (HDP) oxide gapfill method in a lines and space pattern (2003-12-23),
13. 6621112 - DRAM with vertical transistor and trench capacitor memory cells and methods of fabrication (2003-09-16),
14. 6531377 - Method for high aspect ratio gap fill using sequential HDP-CVD (2003-03-11),
15. 6509226 - Process for protecting array top oxide (2003-01-21),
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