Enter inventor name

EPO Patents = 1

Average Co-Inventor Count = 2.6

ph-index = 7

Forward Citations = 334(Granted Patents)

Location History:

Dresden, DE (2004)
Wappingers Falls, NY (US) (2001 - 2005)
Radebeul, DE (2004 - 2006)

Company Filing History:

11 out of 14,724

Infineon Technologies Ag

patents

3 out of 164,197

International Business Machines Corporation

patents

1 out of 244

Infineon Technologies North America Corp.

patents

4. 1 out of 106

Infineon Technologies LLC

patents

5. 2 out of 832,843

Other

patents

Years Active: 2001-2006

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18 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7105404 - Method for fabricating a semiconductor structure (2006-09-12),

2. 7034352 - DRAM with very shallow trench isolation (2006-04-25),

3. 6960514 - Pitcher-shaped active area for field effect transistor and method of forming same (2005-11-01),

4. 6849496 - DRAM with vertical transistor and trench capacitor memory cells and method of fabrication (2005-02-01),

5. 6812092 - Method for fabricating transistors having damascene formed gate contacts and self-aligned borderless bit line contacts (2004-11-02),

6. 6794282 - Three layer aluminum deposition process for high aspect ratio CL contacts (2004-09-21),

7. 6759292 - Method for fabricating a trench capacitor (2004-07-06),

8. 6746933 - Pitcher-shaped active area for field effect transistor and method of forming same (2004-06-08),

9. 6724054 - Self-aligned contact formation using double SiN spacers (2004-04-20),

10. 6716734 - Low temperature sidewall oxidation of W/WN/poly-gatestack (2004-04-06),

11. 6706634 - Control of separation between transfer gate and storage node in vertical DRAM (2004-03-16),

12. 6667223 - High aspect ratio high density plasma (HDP) oxide gapfill method in a lines and space pattern (2003-12-23),

13. 6621112 - DRAM with vertical transistor and trench capacitor memory cells and methods of fabrication (2003-09-16),

14. 6531377 - Method for high aspect ratio gap fill using sequential HDP-CVD (2003-03-11),

15. 6509226 - Process for protecting array top oxide (2003-01-21),

Title: Mihel Seitz: Innovator in Semiconductor Technology

Introduction

Mihel Seitz is a prominent inventor based in Wappingers Falls, NY (US). He holds a total of 18 patents that showcase his contributions to the field of semiconductor technology. His innovative work has significantly impacted the industry, particularly in the development of advanced semiconductor structures.

Latest Patents

Among his latest patents is a method for fabricating a semiconductor structure. This invention outlines a comprehensive process that includes providing a silicon substrate with hard mask layers, utilizing a masking layer, and employing plasma processes to form trenches in the substrate. Another notable patent involves a vertical dynamic random access memory (DRAM) cell device that features a buried strap, which enhances manufacturability while maintaining freedom from cross talk.

Career Highlights

Mihel Seitz has worked with leading companies in the technology sector, including Infineon Technologies AG and IBM. His experience in these organizations has allowed him to refine his skills and contribute to groundbreaking advancements in semiconductor technology.

Collaborations

Throughout his career, Mihel has collaborated with notable professionals such as Venkatachalam C Jaiprakash and Rajeev Malik. These partnerships have fostered innovation and have been instrumental in the development of his patented technologies.

Conclusion

Mihel Seitz is a distinguished inventor whose work in semiconductor technology has led to significant advancements in the field. His patents reflect a commitment to innovation and excellence, making him a key figure in the industry.

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