Michael Rowlandson

This inventor holds 6 USPTO granted patents. Top assignees: Maxim Integrated Products, Inc., Lattice Semiconductor Corporation. Active years: 2003-2006.

USPTO Granted Patents = 6

% Patents Active = 50.0

Average Co-Inventor Count = 3.4

ph-index = 5

Forward Citations = 63(Granted Patents)

Company Filing History:

4 out of 1,298

Maxim Integrated Products, Inc.

patents

2 out of 764

Lattice Semiconductor Corporation

patents

Years Active: 2003-2006

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6 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7026666 - Self-aligned NPN transistor with raised extrinsic base (2006-04-11),

2. 6861324 - Method of forming a super self-aligned hetero-junction bipolar transistor (2005-03-01),

3. 6845044 - Method of preventing high Icc at start-up in zero-power EEPROM cells for PLD applications (2005-01-18),

4. 6767798 - Method of forming self-aligned NPN transistor with raised extrinsic base (2004-07-27),

5. 6686250 - Method of forming self-aligned bipolar transistor (2004-02-03),

6. 6636442 - Non-volatile memory element having a cascoded transistor scheme to reduce oxide field stress (2003-10-21),

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