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For the Inventor, By the Inventor

Fremont, CA, United States of America

Michael J Colwell

USPTO Granted Patents = 14

Average Co-Inventor Count = 3.4

ph-index = 11

Forward Citations = 634(Granted Patents)


Location History:

  • Livermore, CA (US) (1996 - 1998)
  • Fremont, CA (US) (1998 - 2006)

Company Filing History:

goldMedal11 out of 3,715 
 
Lsi Logic Corporation
 patents
silverMedal3 out of 99 
 
Virage Logic Corporation
 patents

Years Active: 1996-2006

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14 patents (USPTO):Explore Patents
1. 7129562 - Dual-height cell with variable width power rail architecture (2006-10-31),
2. 6838713 - Dual-height cell with variable width power rail architecture (2005-01-04),
3. 6617621 - Gate array architecture using elevated metal levels for customization (2003-09-09),
4. 5917207 - Programmable polysilicon gate array base cell architecture (1999-06-29),
5. 5843813 - I/O driver design for simultaneous switching noise minimization and ESD (1998-12-01),
6. 5777354 - Low profile variable width input/output cells (1998-07-07),
7. 5773855 - Microelectronic circuit including silicided field-effect transistor (1998-06-30),
8. 5760428 - Variable width low profile gate array input/output architecture (1998-06-02),
9. 5728612 - Method for forming minimum area structures for sub-micron CMOS ESD (1998-03-17),
10. 5698873 - High density gate array base cell architecture (1997-12-16),
11. 5691218 - Method of fabricating a programmable polysilicon gate array base cell (1997-11-25),
12. 5670890 - Switchable pull-ups and pull-downs for IDDQ testing of integrated (1997-09-23),
13. 5644251 - Switchable pull-ups and pull-downs for IDDQ testing of integrated (1997-07-01),
14. 5552333 - Method for designing low profile variable width input/output cells (1996-09-03),

Title: The Innovative Journey of Michael J. Colwell

Introduction

Michael J. Colwell is an influential inventor based in Fremont, CA, known for his contributions to the technology industry. With an impressive portfolio of 14 patents to his name, Colwell has made significant strides in the field of standard cell architecture, impacting the design and efficiency of modern electronic devices.

Latest Patents

One of Colwell's most recent patents is the "Dual-height cell with variable width power rail architecture." This innovative standard cell architecture features a multi-row basic cell that can span either two or more rows, allowing for greater flexibility in design. By intermixing smaller, single-height cells with higher-drive dual-height basic cells, Colwell’s architecture is tailored for high-density applications. The design accommodates varying transistor sizes, making it a crucial advancement for companies looking to optimize performance. The power rail in this configuration includes conductors of varying width, enhancing current delivery and efficiency.

Career Highlights

Colwell has had a notable career with significant positions at LSI Logic Corporation and Virage Logic Corporation. His work has centered on enhancing semiconductor technologies and solutions, cementing his reputation as a pioneer in the field.

Collaborations

Throughout his career, Michael has collaborated with esteemed colleagues such as Tushar R. Gheewala and Duane G. Breid. These partnerships have contributed to the successful development and implementation of innovative technologies in the industry.

Conclusion

Michael J. Colwell’s contributions to the field of semiconductor technology through his patents and collaborations demonstrate his commitment to advancing innovation. As technology continues to evolve, Colwell’s work will likely play a vital role in shaping the future of electronic design and efficiency.

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