The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2003
Filed:
Jun. 06, 2000
Applicant:
Inventors:
Tushar R. Gheewala, Los Altos, CA (US);
Duane G. Breid, Lakeville, MN (US);
Deepak D. Sherlekar, Cupertino, CA (US);
Michael J. Colwell, Fremont, CA (US);
Assignee:
Virage Logic Corporation, Fremont, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/710 ;
U.S. Cl.
CPC ...
H01L 2/710 ;
Abstract
An metal programmable integrated circuit apparatus and method of manufacture and design using elevated metal layers for design-specific customization. The lower metal layer are used to form core cells and to provide power and clocking signals to the core cells. These core cell are customizable by the designer using only the upper metal layers. This new architecture allows faster turn-around time and fewer masks while keeping the time-to-market advantages of gate array structures.