The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 1998
Filed:
Nov. 13, 1996
Applicant:
Inventors:
Hua-Fang Wei, Sunnyvale, CA (US);
Michael Colwell, Fremont, CA (US);
Randall E Bach, Stillwater, MN (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438200 ; 438133 ; 438210 ; 438238 ; 438307 ;
Abstract
VLSI I/O structures to reduce the effects of simultaneous switching noise (SSN) on output driver circuits and enhance electrostatic discharge immunity, while reducing chip area, in both input receiver circuits and output driver circuits include improved transistors having deep-junction drain and a multi-cascaded, resistive deep-junction source structure.
Wei, Hua-Fang. (1998). I/o driver design for simultaneous switching noise minimization and esd (U.S. Patent No. 5843813). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5843813
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile