Sunnyvale, CA, United States of America

Hua-Fang Wei

This inventor holds 4 USPTO granted patents. Top assignee: Lsi Logic Corporation. Active years: 1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hua-Fang Wei. Retrieved from https://idiyas.com/inventor/hua-fang-wei

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.2

ph-index = 4

Forward Citations = 112(Granted Patents)


Company Filing History:


Years Active: 1998

Loading Chart...
4 patents (USPTO):Explore Patents

Title: Hua-Fang Wei: Semiconductor I/O and ESD Protection Inventor.

Introduction

Hua-Fang Wei is an inventor associated with Sunnyvale, California, and LSI Logic Corporation. His work focuses on semiconductor input/output (I/O) circuits, simultaneous switching noise reduction, and electrostatic discharge (ESD) protection. He is credited with 4 patents.

Latest Patents

Wei’s listed patent work addresses ways to improve the performance and compactness of VLSI I/O structures.

“I/O Driver Design for Simultaneous Switching Noise Minimization and ESD” describes I/O structures designed to reduce simultaneous switching noise in output drivers while improving ESD immunity and limiting chip area. The disclosed approaches include improved transistors with deep-junction drains and multi-cascaded, resistive deep-junction source structures for input receivers and output drivers.

“Electrostatic Discharge (ESD) Structure and Buffer Driver Structure” describes an integrated-circuit design that combines an ESD protection device using a silicon-controlled rectifier (SCR) with an adjoining driver section. The design matches the ESD device’s width to the driver section’s length and the surrounding guard-ring dimensions to help inhibit SCR latchup. It also uses repeated source, gate, and drain regions to reduce the driver’s physical width while retaining sufficient effective width to handle the required power.

Career Highlights

Wei’s patent portfolio reflects work on practical semiconductor design challenges: reducing noise, strengthening ESD protection, preventing latchup, and conserving chip area. These goals are especially relevant to compact, high-performance integrated circuits.

Collaborations

Wei’s listed coworkers include Michael J. Colwell and Ashok K. Kapoor. His work is associated with LSI Logic Corporation.

Conclusion

Hua-Fang Wei’s inventions address key trade-offs in semiconductor I/O design by combining noise reduction, ESD protection, latchup control, and efficient use of chip area.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…