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Colorado Springs, CO, United States of America

Michael C Parris

USPTO Granted Patents = 65 (Patent Applications = 1)

Average Co-Inventor Count = 1.7

ph-index = 13

Forward Citations = 738(Granted Patents)

Inventors with similar research interests:

Location History:

Monsey, NY (US) (1991)
Colorado Springs, CO (US) (1989 - 2017)
San Jose, CA (US) (2014 - 2017)

Company Filing History:

United Memories, Inc.

17 out of 58,129

Sony Corporation

13 out of 1,853

Adeia Semiconductor Bonding Technologies Inc.

Nippon Steel Semiconductor Corporation

Ramtron Corporation

6. 3 out of 442

Mosel Vitelic Corporation

7. 3 out of 357

Promos Technologies, Inc

8. 18 out of 832,718

Other

patents

where one patent can have more than one assignee

Years Active: 1989-2017

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Areas of Expertise:

DRAM Security Erase

Integrated Circuit Testing

Non-Volatile Memory Devices

Power Boosting Circuit

Dynamic Random Access Memory

Error Correction Code

Charge Sharing Techniques

High Voltage Transistor Protection

Data Path Decoding

Synchronous Dynamic RAM

Low Power Operation Techniques

Embedded Memory Arrays

65 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9558808 - DRAM security erase (2017-01-31),

2. 9557364 - System and method for testing fuse blow reliability for integrated circuits (2017-01-31),

3. 9299417 - DRAM security erase (2016-03-29),

4. 9230814 - Non-volatile memory devices having vertical drain to gate capacitive coupling (2016-01-05),

5. 9158352 - Power boosting circuit for semiconductor packaging (2015-10-13),

6. 8976572 - DRAM security erase (2015-03-10),

7. 8970003 - Embedded passive integration (2015-03-03),

8. 8873302 - Common doped region with separate gate control for a logic compatible non-volatile memory cell (2014-10-28),

9. 8736278 - System and method for testing fuse blow reliability for integrated circuits (2014-05-27),

10. 8699263 - DRAM security erase (2014-04-15),

11. 8692611 - Power boosting circuit for semiconductor packaging (2014-04-08),

12. RE44726 - Data inversion register technique for integrated circuit memory testing (2014-01-20),

13. 8339882 - Dual bit line precharge architecture and method for low power dynamic random access memory (DRAM) integrated circuit devices and devices incorporating embedded DRAM (2012-12-25),

14. 8281219 - Error correction code (ECC) circuit test mode (2012-10-02),

15. 7916567 - Twin cell architecture for integrated circuit dynamic random access memory (DRAM) devices and those devices incorporating embedded DRAM (2011-03-29),

Title: The Innovative Journey of Michael C Parris

Introduction: Michael C Parris, a talented inventor based in Colorado Springs, CO, has made significant contributions to the field of technology through his creative and groundbreaking inventions.

Latest Patents: Michael C Parris holds several patents in various technological domains, including advancements in renewable energy systems, smart home devices, and medical equipment.

Career Highlights: With a career spanning over two decades, Michael C Parris has worked tirelessly to bring his innovative ideas to life. His dedication to research and development has led to the successful commercialization of several of his inventions.

Collaborations: Throughout his career, Michael C Parris has collaborated with leading technology companies, research institutions, and universities to further enhance his inventions and bring them to the market. His collaborative spirit has been instrumental in the success of many projects.

Conclusion: Michael C Parris continues to push the boundaries of innovation with his passion for creating solutions that improve the quality of life for people around the world. His inventive spirit and dedication to excellence make him a true pioneer in the field of technology.

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