Vancouver, WA, United States of America

Masami Nakano

This inventor holds 15 USPTO granted patents, primarily in Semiconductor Processing. Top assignees: Shin-Etsu Handotai Co., Ltd., Seh America, Inc.. Active years: 1991-2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masami Nakano. Retrieved from https://idiyas.com/inventor/masami-nakano

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 8

Forward Citations = 140(Granted Patents)


Location History:

  • Annaka, JP (1991)
  • Fukushima, JP (1995)
  • Nishigo, JP (1996)
  • Fukushima-ken, JP (1996 - 1997)
  • Nishi-shirakawa-gun, JP (1997 - 1998)
  • Vancouver, WA (US) (1997 - 2003)

Company Filing History:


Years Active: 1991-2003

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Areas of Expertise:
Wafer Cleaning
Alkaline Etching
Semiconductor Wafers
Edge Stain Prevention
Ozone Dipping
Oxygen Annealing
Gettering
Particle Inspection
Hot Deionized Water
Cleaning Baths
Polishing Techniques
Bonded Wafers
15 patents (USPTO):Explore Patents

Title: Innovations of Masami Nakano

Introduction

Masami Nakano is a prominent inventor based in Vancouver, WA (US), known for his significant contributions to the field of semiconductor technology. With a total of 15 patents to his name, Nakano has developed innovative solutions that enhance the efficiency and quality of semiconductor manufacturing processes.

Latest Patents

Among his latest patents is a "System for reducing wafer contamination using freshly conditioned alkaline etching solution." This system is designed to condition an alkaline etching solution, which is crucial for reducing contamination during the silicon wafer etching process. It includes a conditioning tank for mixing the solution, a conditioning chemical introduction system, and a buffer tank for storing the conditioned solution before use. Another notable patent is the "Method of purifying alkaline solution and method of etching." This method involves dissolving metallic silicon and/or silicon compounds in an alkaline solution to purify it, significantly decreasing metallic ions at a low cost. The etching method ensures that the quality of semiconductor wafers is maintained without deterioration in the characteristics of the semiconductor devices.

Career Highlights

Throughout his career, Nakano has worked with esteemed companies such as Shin-Etsu Handotai Co., Ltd. and SEH America, Inc. His experience in these organizations has allowed him to refine his expertise in semiconductor technologies and contribute to advancements in the industry.

Collaborations

Masami Nakano has collaborated with notable professionals in his field, including Isao Uchiyama and Hisashi Masumura. These collaborations have further enriched his work and led to innovative developments in semiconductor manufacturing.

Conclusion

Masami Nakano's contributions to semiconductor technology through his patents and collaborations highlight his role as a key innovator in the industry. His work continues to influence the field, ensuring advancements in the quality and efficiency of semiconductor manufacturing processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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