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Vancouver, WA, United States of America

Seh America, Inc.

USPTO Granted Patents = 163

% Expired Patents = 17.2

Forward Citations = 1,765

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143 inventors (with patents filed for the assignee):

Richard M Aydelott (16 out of 20 patents)

Oleg V Kononchuk (16 out of 16 patents)

Sergei V Koveshnikov (15 out of 23 patents)

4. Gerald R Dietze (15 out of 16 patents)

5. Zbigniew J Radzimski (10 out of 10 patents)

6. Allen R Boyce (10 out of 10 patents)

7. Douglas G Anderson (8 out of 8 patents)

8. Witawat Wijaranakula (8 out of 8 patents)

9. Mark R Boydston (5 out of 5 patents)

10. Neil A Weaver (5 out of 5 patents)

11. Mark J Greisz (5 out of 5 patents)

12. Aaron L LaBrie (5 out of 5 patents)

13. Sean G Hanna (4 out of 4 patents)

14. Barton V White (4 out of 4 patents)

15. Masami Nakano (4 out of 15 patents)

Core Competencies:

Wafer Processing

High Resistivity Silicon

Contamination Reduction

Epitaxial Growth

Czochralski Method

Slurry Recycling

Defect Detection

Process Data Collection

Silicon Substrates

Chemical Treatment

Doped Semiconductors

Thermophotovoltaic Generator

163 patents: Sort by Forward Citations

1. 7229601 - Ammonia reclamation system (2007-06-12),

2. 7196009 - Lapping carrier, apparatus for lapping a wafer and method of fabricating a lapping carrier (2007-03-27),

3. 7137405 - Low pressure check valve (2006-11-21),

4. 7112509 - Method of producing a high resistivity SIMOX silicon substrate (2006-09-26),

5. 7059943 - Method and apparatus for recycling slurry (2006-06-13),

6. 6896727 - Method of determining nitrogen concentration within a wafer (2005-05-24),

7. 6889684 - Apparatus, system and method for cutting a crystal ingot (2005-05-10),

8. 6849548 - Method of reducing particulate contamination during polishing of a wafer (2005-02-01),

9. 6825487 - Method for isolation of wafer support-related crystal defects (2004-11-30),

10. 6808564 - In-situ post epitaxial treatment process (2004-10-26),

11. 6798526 - Methods and apparatus for predicting oxygen-induced stacking fault density in wafers (2004-09-28),

12. 6794227 - Method of producing an SOI wafer (2004-09-21),

13. 6773932 - System and method for collecting, storing, and displaying process data including particle measurement data (2004-08-10),

14. 6768965 - Methods and computer program products for characterizing a crystalline structure (2004-07-27),

15. 6760403 - Method and apparatus for orienting a crystalline body during radiation diffractometry (2004-07-06),

Seh America, Inc. is a prominent player in the semiconductor manufacturing sector, headquartered in Vancouver, Washington. The company specializes in advanced wafer processing technologies, focusing on high resistivity silicon and epitaxial growth techniques. With a commitment to innovation, Seh America emphasizes contamination reduction and defect detection, ensuring high-quality semiconductor products. Their expertise extends to the Czochralski method and slurry recycling, contributing to efficient and sustainable manufacturing processes in the semiconductor industry.

Profile summary based on public USPTO records.

Company Badge

USPTO Data Jan 1 1976 - Oct 6 2026

Seh America, Inc.

163 Patents

#3 in Vancouver, WA

#46 in Washington

#2,437 in US

#5,064 in the World

Vancouver, WA, United States of America

Seh America, Inc.

Forward Citations = 1,765

143 inventors:

Richard M Aydelott (16 out of 20 patents)

Oleg V Kononchuk (16 out of 16 patents)

Sergei V Koveshnikov (15 out of 23 patents)

4. Gerald R Dietze (15 out of 16 patents)

5. Zbigniew J Radzimski (10 out of 10 patents)

Please report any incorrect information to [email protected]

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