Akishima, Japan

Masahiko Hiratani

This inventor holds 39 USPTO granted patents and 1 published patent application, primarily in Semiconductor Devices. Top assignees: Hitachi, Ltd., Renesas Technology Corp., Renesas Electronics Corporation. Active years: 1987-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masahiko Hiratani. Retrieved from https://idiyas.com/inventor/masahiko-hiratani

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 39 

% Patents Active = 56.4

Average Co-Inventor Count = 4.0

ph-index = 10

Forward Citations = 352(Granted Patents)


Location History:

  • Tokyo, JP (1993)
  • Akishima, JP (1991 - 2010)
  • Kokubunji, JP (1987 - 2012)

Company Filing History:


Years Active: 1987-2012

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Areas of Expertise:
Semiconductor Device
DRAM Memory Cells
Capacitor Structure
Fabrication Method
Integrated Circuits
Ruthenium Film
Tantalum Oxide
Superconducting Elements
Bi-layer Oxide Ferroelectrics
Memory Structure
High Permittivity Dielectric
Josephson Junction
39 patents (USPTO):Explore Patents

Title: **Masahiko Hiratani: Innovator in Semiconductor Technologies**

Introduction

Masahiko Hiratani is an influential inventor based in Akishima, Japan. With an impressive portfolio of 39 patents, his contributions to semiconductor technology have significantly advanced the field. His innovative approaches are particularly evident in his latest developments involving DRAM memory and logic circuits.

Latest Patents

One of Hiratani's most notable patents is titled "Semiconductor device having plural DRAM memory cells and a logic circuit and method for manufacturing the same." This invention describes a memory cell capacitor of a DRAM formed by a MIM capacitor, which utilizes a metal wiring line as its electrode. This design strategy not only reduces process costs but also enables higher integration through the use of high dielectric constant materials. The capacitors are strategically positioned above wiring layers containing bit lines, and the incorporation of 2T cells ensures adequate signal strength even at low voltages. By standardizing the fabrication processes for both analog and memory components, his invention allows for the realization of semiconductor integrated circuits that combine logic, analog, and memory functions on a single chip while keeping costs low.

Career Highlights

Hiratani has had a distinguished career working with leading technology companies. He has been associated with renowned organizations, including Hitachi, Ltd. and Renesas Technology Corporation, where he has contributed significantly to the advancement of semiconductor technologies.

Collaborations

Throughout his career, Masahiko Hiratani has collaborated with esteemed professionals such as Yuichi Matsui and Yasuhiro Shimamoto. Their collective expertise has undoubtedly led to groundbreaking innovations in the semiconductor industry.

Conclusion

In summary, Masahiko Hiratani's contributions to semiconductor technology, especially in the area of DRAM memory cells and integrated circuits, showcase his inventive spirit and dedication to innovation. With a legacy of numerous patents and successful collaborations, he continues to inspire the next generation of inventors in the field of semiconductors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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