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For the Inventor, By the Inventor

Cedar Park, TX, United States of America

Mark W Michael

USPTO Granted Patents = 113


Average Co-Inventor Count = 4.8

ph-index = 24

Forward Citations = 2,240(Granted Patents)


Inventors with similar research interests:


Location History:

  • Cedar Creek, TX (US) (1999)
  • Cedar Pond, TX (US) (2000)
  • Austin, TX (US) (1998 - 2001)
  • Cedar Park, US (2001)
  • Cedar Park, TX (US) (1997 - 2014)

Company Filing History:

goldMedal106 out of 12,867 
 
Advanced Micro Devices Corporation
 patents
silverMedal6 out of 5,671 
 
Globalfoundries Inc.
 patents
bronzeMedal1 out of 832,680 
Other
 patents

Years Active: 1997-2014

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113 patents (USPTO):
1. 8687417 - Electronic device and method of biasing (2014-04-01),
2. 8329519 - Methods for fabricating a semiconductor device having decreased contact resistance (2012-12-11),
3. 8134208 - Semiconductor device having decreased contact resistance (2012-03-13),
4. 7861195 - Process for design of semiconductor circuits (2010-12-28),
5. 7793240 - Compensating for layout dimension effects in semiconductor device modeling (2010-09-07),
6. 7761838 - Method for fabricating a semiconductor device having an extended stress liner (2010-07-20),
7. 7670938 - Methods of forming contact openings (2010-03-02),
8. 7638837 - Stress enhanced semiconductor device and methods for fabricating same (2009-12-29),
9. 7598161 - Method of forming transistor devices with different threshold voltages using halo implant shadowing (2009-10-06),
10. 7504270 - Methods of quantifying variations resulting from manufacturing-induced corner rounding of various features, and structures for testing same (2009-03-17),
11. 7473623 - Providing stress uniformity in a semiconductor device (2009-01-06),
12. 7391226 - Contact resistance test structure and methods of using same (2008-06-24),
13. 7355201 - Test structure for measuring electrical and dimensional characteristics (2008-04-08),
14. 7271047 - Test structure and method for measuring the resistance of line-end vias (2007-09-18),
15. 6964875 - Array of gate dielectric structures to measure gate dielectric thickness and parasitic capacitance (2005-11-15),

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