The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2009
Filed:
Sep. 26, 2007
Jingrong Zhou, Austin, TX (US);
Mark Michael, Cedar Park, TX (US);
Donna Michael, Legal Representative, Cedar Park, TX (US);
David Wu, Austin, TX (US);
James F. Buller, Austin, TX (US);
Akif Sultan, Austin, TX (US);
Jingrong Zhou, Austin, TX (US);
Mark Michael, Cedar Park, TX (US);
Donna Michael, legal representative, Cedar Park, TX (US);
David Wu, Austin, TX (US);
James F. Buller, Austin, TX (US);
Akif Sultan, Austin, TX (US);
Advanced Micro Devices, Inc., Austin, TX (US);
Abstract
The halo implant technique described herein employs a halo implant mask that creates a halo implant shadowing effect during halo dopant bombardment. A first transistor device structure and a second transistor device structure are formed on a wafer such that they are orthogonally oriented to each other. A common halo implant mask is created with features that prevent halo implantation of the diffusion region of the second transistor device structure during halo implantation of the diffusion region of the first transistor device structure, and with features that prevent halo implantation of the diffusion region of the first transistor device structure during halo implantation of the diffusion region of the second transistor device structure. The orthogonal orientation of the transistor device structures and the pattern of the halo implant mask obviates the need to create multiple implant masks to achieve different threshold voltages for the transistor device structures.