Sunnyvale, CA, United States of America

Mario Garza

This inventor holds 31 USPTO granted patents, primarily in Optical Proximity Correction. Top assignees: Lsi Logic Corporation, Lsi Corporation. Active years: 1994-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mario Garza. Retrieved from https://idiyas.com/inventor/mario-garza

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 74.2

Average Co-Inventor Count = 2.2

ph-index = 15

Forward Citations = 1,423(Granted Patents)


Location History:

  • San Jose, CA (US) (2000 - 2006)
  • Sunnyvale, CA (US) (1994 - 2007)

Company Filing History:


Years Active: 1994-2007

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Areas of Expertise:
Optical Proximity Correction
Mask Defect Analysis
Wafer Process
Critical Dimension
Illumination Optimization
Photomask Inspection
Photoresist Thickness
Mask Error Constraints
Aerial Image Comparison
Design Layout Corrections
Calibration Techniques
Guard Rings
31 patents (USPTO):Explore Patents

Title: Innovations and Contributions of Mario Garza in Photolithography

Introduction

Mario Garza, located in Sunnyvale, California, is a prolific inventor with 31 patents to his name. His work primarily focuses on advancements in photolithography processes, which play a crucial role in semiconductor manufacturing. Through his innovative methods, Mario has significantly contributed to the optimization of design layouts, enhancing efficiency and accuracy in the production of microelectronics.

Latest Patents

Among Mario Garza's latest inventions are two notable patents that showcase his expertise. The first patent, titled "Process Window Compliant Corrections of Design Layout," details a method for performing corrections in design layouts while ensuring compliance with process window specifications. This invention involves simulating critical dimensions under optimal exposure conditions and modifying layout patterns iteratively until specifications are met.

The second patent, "OPC Based Illumination Optimization with Mask Error Constraints," presents a method and system for optimizing mask illumination in photolithography. This method includes several steps: loading design rules and constraints, simulating current conditions, and adjusting illumination to maximize depth of focus in alignment with exposure latitude and error constraints. Together, these inventions reflect Mario's dedication to advancing technology in the semiconductor industry.

Career Highlights

Mario's career has been marked by significant contributions while working with prominent companies such as LSI Logic Corporation and LSI Corporation. His work at these organizations has positioned him as a key player in the development of cutting-edge technologies in photolithography, influencing both industry practices and product development.

Collaborations

Throughout his career, Mario Garza has collaborated with notable professionals, including Keith K. Chao and Nicholas K. Eib. These collaborations have enabled him to leverage diverse expertise, fostering innovation and pushing the boundaries of what is possible in semiconductor manufacturing.

Conclusion

Mario Garza stands out as an influential inventor in the realm of photolithography, with multiple patents that demonstrate his innovative capabilities. His work not only enhances the efficiency of semiconductor processes but also contributes to the broader landscape of technology advancements. With a career steeped in collaboration and innovation, Mario continues to inspire the next generation of inventors in this vital field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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