This inventor holds 7 USPTO granted patents. Top assignee: Sharp Kabushiki Kaisha Corporation. Active years: 1993-2009.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Location History:
- Tenri-chi, JP (1998)
- Tenri, JP (1993 - 2000)
- Kadoma, JP (2002)
- Hiroshima, JP (2007)
- Fukuyama, JP (2009)
Company Filing History:
Years Active: 1993-2009
Title: Kenichi Azuma: Semiconductor Device Inventor
Introduction
Kenichi Azuma is an inventor based in Tenri, Japan. His work includes semiconductor device structures and fabrication methods, and he is associated with Sharp Kabushiki Kaisha Corporation. He is credited with 7 patents.
Latest Patents
Azuma’s listed recent patents address semiconductor isolation, transistor control, and reducing parasitic capacitance.
“Semiconductor Device and Fabrication Method Thereof” describes a device with two insulating layers in a trench. The first layer electrically isolates two MOSFETs, while the second has regions with different true stresses that oppose the stress of the first layer. The structure is designed to allow independent control of drain current in each MOSFET in a device using shallow trench isolation.
“Semiconductor Device Having a Low Dielectric Constant Film and Manufacturing Method Thereof” describes using a low-dielectric-constant material as the gate sidewall to reduce parasitic capacitance. The patent specifies a material with a relative dielectric constant below that of an oxide film, approximately 3.9.
Career Highlights
Azuma’s listed patent work focuses on semiconductor engineering, including transistor performance and device fabrication. His association with Sharp Kabushiki Kaisha Corporation connects his work to a company active in electronics and technology.
Collaborations
Among Azuma’s listed coworkers are Akio Kawamura and Shinichi Sato.
Conclusion
Kenichi Azuma’s patent portfolio reflects contributions to semiconductor device design, particularly MOSFET control, isolation structures, and capacitance reduction.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
