Hyogo, Japan

Jun Ohtani

This inventor holds 24 USPTO granted patents and 1 EPO patent, primarily in Semiconductor Memory. Top assignees: Renesas Technology Corp., Mitsubishi Denki Kabushiki Kaisha. Active years: 1996-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jun Ohtani. Retrieved from https://idiyas.com/inventor/jun-ohtani

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 58.3


Average Co-Inventor Count = 1.8

ph-index = 14

Forward Citations = 868(Granted Patents)


Company Filing History:


Years Active: 1996-2007

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Areas of Expertise:
Nonvolatile Memory
Semiconductor Device
Redundancy Repair
High-Speed Reading
Thin Film Magnetic Memory
Testing Apparatus
Integrated Circuit
Memory Cell
Data Input/Output
Self-Testing Circuit
Microcomputer
Clock Synchronous
24 patents (USPTO):Explore Patents

Title: Innovations of Jun Ohtani: A Pioneer in Memory Device Technology

Introduction

Jun Ohtani, based in Hyogo, Japan, is a proficient inventor who has made significant contributions to the technology of semiconductor memory devices. With a remarkable portfolio of 24 patents, Ohtani stands out as a leader in innovation within the industry.

Latest Patents

Ohtani’s most recent inventions include a nonvolatile semiconductor memory device designed for efficient data input/output. This device applies a write voltage for a predetermined period during the writing operation to specific memory cells. Following this, a verifying operation is executed using a sense amplifier circuit and a comparator. If the writing process is deemed insufficient, the memory control circuit instructs a repeated writing operation, optimizing the write voltage for accuracy.

Another significant invention is a semiconductor integrated circuit device that incorporates a memory tester circuit capable of analyzing redundancy repairs. This device performs a readout operation, comparing data retrieved from memory cells with expected values. It features an associated memory cell array and test block, where each test block includes a replacement determination unit. This unit writes a defective address only when a new defective memory cell address is identified, ensuring reliability and efficiency.

Career Highlights

Throughout his career, Jun Ohtani has worked with distinguished companies, including Renesas Technology Corporation and Mitsubishi Electric Corporation. His work at these leading firms has allowed him to hone his skills and develop cutting-edge technologies that push the boundaries of semiconductor design.

Collaborations

Ohtani collaborates closely with other talented engineers, including Tsukasa Ooishi and Hiroshi Kato. Their collective expertise has fostered a culture of innovation, leading to the successful development and patenting of advanced memory technologies.

Conclusion

Jun Ohtani’s contributions to semiconductor memory technology showcase his role as an influential inventor. With a robust patent portfolio and ongoing collaborations with esteemed colleagues, Ohtani continues to shape the future of data storage solutions, solidifying his legacy as a key player in the field of innovations and inventions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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