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For the Inventor, By the Inventor

Langebrueck, Germany

Joachim Patzer

USPTO Granted Patents = 11

Average Co-Inventor Count = 3.0

ph-index = 3

Forward Citations = 22(Granted Patents)


Location History:

  • Langebruck, DE (2014)
  • Langebueck, DE (2015)
  • Langebrueck, DE (2014 - 2017)

Company Filing History:

goldMedal11 out of 5,671 
 
Globalfoundries Inc.
 patents

Years Active: 2014-2017

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11 patents (USPTO):
1. 9646838 - Method of forming a semiconductor structure including silicided and non-silicided circuit elements (2017-05-09),
2. 9177874 - Method of forming a semiconductor device employing an optical planarization layer (2015-11-03),
3. 9177871 - Balancing asymmetric spacers (2015-11-03),
4. 9111756 - Integrated circuits with protected resistors and methods for fabricating the same (2015-08-18),
5. 9064961 - Integrated circuits including epitaxially grown strain-inducing fills doped with boron for improved robustness from delimination and methods for fabricating the same (2015-06-23),
6. 9034746 - Gate silicidation (2015-05-19),
7. 9029919 - Methods of forming silicon/germanium protection layer above source/drain regions of a transistor and a device having such a protection layer (2015-05-12),
8. 8969190 - Methods of forming a layer of silicon on a layer of silicon/germanium (2015-03-03),
9. 8906794 - Gate silicidation (2014-12-09),
10. 8889022 - Methods of forming asymmetric spacers on various structures on integrated circuit products (2014-11-18),
11. 8765542 - Methods of forming a semiconductor device while preventing or reducing loss of active area and/or isolation regions (2014-07-01),

Title: Innovations by Joachim Patzer

Introduction

Joachim Patzer is a notable inventor based in Langebrueck, Germany. He has made significant contributions to the field of semiconductor technology, holding a total of 11 patents. His work focuses on improving semiconductor structures and manufacturing processes.

Latest Patents

One of his latest patents is titled "Method of forming a semiconductor structure including silicided and non-silicided circuit elements." This method involves providing a semiconductor structure with different circuit elements and forming a dielectric layer with intrinsic stress. The process includes a first annealing step that creates intrinsic stress in the semiconductor material, followed by the removal of a portion of the dielectric layer. A layer of metal is then formed, which reacts with the semiconductor material to create a silicide, while another portion of the dielectric layer prevents unwanted chemical reactions.

Another significant patent is "Balancing asymmetric spacers." This invention addresses the issue of spacer thickness imbalance in semiconductor circuits that include PFETs with an SiGe alloy and NFETs without it. The proposed manufacturing flow introduces a spacer-reducing etching process before salicidation, which helps to thin the NFET spacer structures and balance the thickness between NFETs and PFETs.

Career Highlights

Joachim Patzer is currently employed at Globalfoundries Inc., where he continues to innovate in semiconductor manufacturing. His expertise and inventions have contributed to advancements in the industry, enhancing the performance and efficiency of semiconductor devices.

Collaborations

Throughout his career, Joachim has collaborated with talented individuals such as Dominic Thurmer and Ardechir Pakfar. These collaborations have fostered a creative environment that encourages innovation and the development of cutting-edge technologies.

Conclusion

Joachim Patzer's contributions to semiconductor technology through his patents and collaborations highlight his role as a leading inventor in the field. His innovative methods and solutions continue to shape the future of semiconductor manufacturing.

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