Hsinchu, Taiwan

Jing-Yi Lin

USPTO Granted Patents = 9 

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 7(Granted Patents)


Location History:

  • Hsinchu, TW (2022 - 2024)
  • Taipei, TW (2023 - 2024)

Company Filing History:


Years Active: 2022-2025

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9 patents (USPTO):

Title: Innovations of Jing-Yi Lin

Introduction

Jing-Yi Lin is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of nine patents. His work focuses on enhancing the performance and reliability of integrated circuits.

Latest Patents

One of his latest patents is titled "Test structure and test method thereof." This invention provides a test structure on a wafer that includes multiple cells under test, first input pads, and second input pads. The cells are arranged in a test array, allowing for efficient testing of integrated circuits. Another notable patent is "Integrated circuit with latch-up immunity." This patent outlines a method for forming an integrated chip that enhances its reliability by preventing latch-up conditions.

Career Highlights

Jing-Yi Lin is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His innovative work has contributed to the advancement of technology in this field.

Collaborations

He has collaborated with notable coworkers, including Chih-Chuan Yang and Shih-Hao Lin, to further enhance the development of semiconductor technologies.

Conclusion

Jing-Yi Lin's contributions to semiconductor technology through his patents and collaborations highlight his role as a key innovator in the industry. His work continues to influence advancements in integrated circuit design and testing.

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