The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

May. 13, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Jing-Yi Lin, Taipei, TW;

Chih-Chuan Yang, Tainan, TW;

Kuo-Hsiu Hsu, Zhongli, TW;

Lien-Jung Hung, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); G01R 31/2884 (2013.01);
Abstract

Test structures on a wafer are provided. A plurality of cells are arranged in rows and columns of a test array. First and second output pads are formed on opposite sides of the test array. A first output pad is coupled to the cells in one half of the rows of the test array. A second output pad is coupled to the cells in the other half of the rows of the test array. Each first input pad is coupled to the cells in respective column of the test array. Each second input pad is coupled to the cells in respective row of the test array. When a first voltage is applied to one of the first input pads and a second voltage is applied to one of the second input pads, current flowing through the turned-on cell is measured through the first or second output pad.


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