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For the Inventor, By the Inventor

Cary, NC, United States of America

Jihoon Jeong

This inventor holds 17 USPTO granted patents and 3 published patent applications and 3 EPO patents, primarily in Memory Circuit Design. Top assignee: Qualcomm Incorporated. Active years: 2016-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jihoon Jeong. Retrieved from https://idiyas.com/inventor/jihoon-jeong

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 17 

% Patents Active = 70.6

 

Average Co-Inventor Count = 5.3

ph-index = 4

Forward Citations = 47(Granted Patents)


Company Filing History:

goldMedal17 out of 45,002 
 
Qualcomm Incorporated
 patents

Years Active: 2016-2026

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Areas of Expertise:
Memory Circuits
SRAM
Power Optimization
Read-Assist Circuits
P-Type Field-Effect Transistor
Dynamic Tag Compare
High-Bandwidth
Bitline Delay
Architecture State Information
Clock Distribution
17 patents (USPTO):Explore Patents
1. 12769614 - Method and apparatus for saving and restoring architecture state information of processing elements to memory during power state transitions (2026-10-20),
2. 12592700 - Logic optimizing power switch enable delay (2026-03-31),
3. 11270761 - Dual-mode high-bandwidth SRAM with self-timed clock circuit (2022-03-08),
4. 11031075 - High bandwidth register file circuit with high port counts for reduced bitline delay (2021-06-08),
5. 10978139 - Dual-mode high-bandwidth SRAM with self-timed clock circuit (2021-04-13),
6. 10622043 - Multi-pump memory system access circuits for sequentially executing parallel memory operations (2020-04-14),
7. 10424392 - Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods (2019-09-24),
8. 10224084 - Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods (2019-03-05),
9. 10163490 - P-type field-effect transistor (PFET)-based sense amplifiers for reading PFET pass-gate memory bit cells, and related memory systems and methods (2018-12-25),
10. 10115481 - Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods (2018-10-30),
11. 10026456 - Bitline positive boost write-assist circuits for memory bit cells employing a P-type Field-Effect transistor (PFET) write port(s), and related systems and methods (2018-07-17),
12. 9984730 - Negative supply rail positive boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods (2018-05-29),
13. 9947406 - Dynamic tag compare circuits employing P-type field-effect transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and related systems and methods (2018-04-17),
14. 9842634 - Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods (2017-12-12),
15. 9741452 - Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods (2017-08-22),

Title: The Innovative Contributions of Jihoon Jeong

Introduction

Jihoon Jeong is a prominent inventor based in Cary, NC, known for his significant contributions to the field of memory technology. With a total of 15 patents to his name, he has made remarkable advancements that enhance the performance and efficiency of memory systems. His work is particularly recognized in the realm of high-bandwidth memory solutions.

Latest Patents

Among Jihoon Jeong's latest patents is the "Dual-mode high-bandwidth SRAM with self-timed clock circuit." This innovative memory design features a self-timed clock circuit that asserts a sense enable signal for a sense amplifier. In low-bandwidth read mode, the circuit activates the sense enable signal only once during a memory clock cycle, allowing the sense amplifier to sense a single bit from multiplexed columns. Conversely, in high-bandwidth read mode, the circuit successively asserts the sense enable signal, enabling the sense amplifier to sense multiple bits from the multiplexed columns.

Another notable patent is the "High bandwidth register file circuit with high port counts for reduced bitline delay." This circuit significantly reduces the shared local read bitline RC delay, facilitating ultra-high performance register files with high port counts. By incorporating read stack nfets in a multiplexer circuit instead of the memory cell, the local read bitline RC becomes independent of the number of read and write ports of the memory cell.

Career Highlights

Jihoon Jeong is currently employed at Qualcomm Incorporated, a leading company in the telecommunications and semiconductor industry. His work at Qualcomm has allowed him to push the boundaries of memory technology, contributing to the development of advanced solutions that meet the demands of modern computing.

Collaborations

Throughout his career, Jihoon has collaborated with esteemed colleagues such as Keith Alan Bowman and Francois Ibrahim Atallah. These partnerships have fostered an environment of innovation and creativity, leading to groundbreaking advancements in memory technology.

Conclusion

Jihoon Jeong's contributions to the field of memory technology are invaluable. His innovative patents and work at Qualcomm demonstrate his commitment to advancing the industry. As he continues to develop new solutions, his impact on technology will undoubtedly be felt for years to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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