The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2019

Filed:

Oct. 19, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Francois Ibrahim Atallah, Raleigh, NC (US);

Keith Alan Bowman, Morrisville, NC (US);

David Joseph Winston Hansquine, Raleigh, NC (US);

Jihoon Jeong, Cary, NC (US);

Hoan Huu Nguyen, Cary, NC (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/52 (2006.01); G11C 11/419 (2006.01); G11C 11/00 (2006.01); G11C 11/412 (2006.01); G11C 11/418 (2006.01); H01L 27/11 (2006.01);
U.S. Cl.
CPC ...
G11C 29/52 (2013.01); G11C 11/00 (2013.01); G11C 11/412 (2013.01); G11C 11/418 (2013.01); G11C 11/419 (2013.01); H01L 27/1104 (2013.01); H01L 27/11 (2013.01);
Abstract

Read-assist circuits for memory bit cells employing a P-type Field-Effect Transistor (PFET) read port(s) are disclosed. Related memory systems and methods are also disclosed. It has been observed that as node technology is scaled down in size, PFET drive current (i.e., drive strength) exceeds N-type FET (NFET) drive current for like-dimensioned FETs. In this regard, in one aspect, it is desired to provide memory bit cells having PFET read ports, as opposed to NFET read ports, to increase memory read times to the memory bit cells, and thus improve memory read performance. To mitigate or avoid a read disturb condition that could otherwise occur when reading the memory bit cell, read-assist circuits are provided for memory bit cells having PFET read ports.


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