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For the Inventor, By the Inventor

Boise, ID, United States of America

Jian Li

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This inventor holds 59 USPTO granted patents and 8 published patent applications and 5 EPO patents, primarily in Semiconductor Technology (CPC class H01L). Top assignees: Micron Technology Incorporated, Nan Ya Technology Corporation. Active years: 2012-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jian Li. Retrieved from https://idiyas.com/inventor/jian-li-vairmodq

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 59 

% Patents Active = 100.0

 

Average Co-Inventor Count = 3.2

ph-index = 8

Forward Citations = 190(Granted Patents)

Forward Citations (Not Self Cited) = 142(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Boise, IA (US) (2013)
  • Boise, ID (US) (2012 - 2024)

Company Filing History:

goldMedal58 out of 39,222 
 
Micron Technology Incorporated
 patents
silverMedal1 out of 2,580 
 
Nan Ya Technology Corporation
 patents

Years Active: 2012-2025

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Areas of Expertise:
Memory Arrays
Stacked Semiconductor Die
Thermal Management
Microelectronic Devices
Circuit Structure
Bonding Pads
Vapor Chamber
Integrated Assemblies
Transistor Arrays
Capacitor Formation
59 patents (USPTO):Explore Patents
1. 12356617 - Microelectronic devices with vertically recessed channel structures and discrete, spaced inter-slit structures, and related methods and systems (2025-07-08),
2. 12213317 - Memory arrays and methods used in forming a memory array comprising strings of memory cells (2025-01-28),
3. 11889695 - Device, a method used in forming a circuit structure, a method used in forming an array of elevationally-extending transistors and a circuit structure adjacent thereto (2024-01-30),
4. 11864387 - Memory arrays and methods used in forming a memory array comprising strings of memory cells (2024-01-02),
5. 11792991 - Memory arrays and methods used in forming a memory array comprising strings of memory cells (2023-10-17),
6. 11776877 - Methods of manufacturing stacked semiconductor die assemblies with high efficiency thermal paths (2023-10-03),
7. 11658132 - Integrated assemblies (2023-05-23),
8. 11594462 - Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods (2023-02-28),
9. 11563022 - Memory arrays and methods used in forming a memory array comprising strings of memory cells (2023-01-24),
10. 11562986 - Stacked semiconductor die assemblies with partitioned logic and associated systems and methods (2023-01-24),
11. 11417681 - Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias (2022-08-16),
12. 11302634 - Microelectronic devices with symmetrically distributed staircase stadiums and related systems and methods (2022-04-12),
13. 11244955 - Memory arrays and methods used in forming a memory array comprising strings of memory cells (2022-02-08),
14. 11239181 - Integrated assemblies (2022-02-01),
15. 11177271 - Device, a method used in forming a circuit structure, a method used in forming an array of elevationally-extending transistors and a circuit structure adjacent thereto (2021-11-16),

Title: The Innovative Contributions of Jian Li

Introduction

Jian Li is a distinguished inventor based in Boise, Idaho, renowned for his innovative contributions in the field of memory technology. With an impressive portfolio of 58 patents, he has made significant advancements that push the boundaries of electronic design and semiconductor processes.

Latest Patents

Among Jian Li's latest patents are two pivotal inventions related to memory arrays. The first patent details a memory array comprising strings of memory cells. This innovative design features laterally-spaced memory blocks, each containing a vertical stack of alternating insulative and conductive tiers. The operative channel-material strings embedded within these tiers form a memory plane with a unique elevationally-extending wall, which enhances the memory structure's performance and efficiency.

The second patent revolves around a device that incorporates an array of elevationally-extending transistors. This invention integrates a stair step circuit structure featuring vertically-alternating conductive steps, each electrically coupled to components situated below. The patent also outlines various methods employed in forming this complex circuit structure, highlighting the ingenuity of Jian Li's designs.

Career Highlights

Jian Li's career includes valuable experience at prominent companies such as Micron Technology Incorporated and Nan Ya Technology Corporation, where he was instrumental in developing advanced memory technologies. His contributions have not only been recognized through patents but also through their impactful applications in the electronics industry.

Collaborations

Throughout his career, Jian Li has collaborated with esteemed colleagues like Steven K. Groothuis and Jaspreet Singh Gandhi. These collaborations have fostered a dynamic exchange of ideas, further enhancing the innovative environment in which he operates.

Conclusion

Jian Li's work exemplifies the spirit of innovation within the semiconductor industry. His numerous patents reflect a deep understanding of electronic devices and memory technologies, showcasing how his inventions continue to influence advancements in electronic design. As he continues to explore new horizons in technology, Jian Li remains a pivotal figure in pushing the boundaries of what is possible in electronic memory applications.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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