Ji-myoung Lee

This inventor holds 16 USPTO granted patents and 1 published patent application. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2010-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ji-myoung Lee. Retrieved from https://idiyas.com/inventor/ji-myoung-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 16 (Patent Applications = 1)

% Patents Active = 68.8

Average Co-Inventor Count = 4.7

ph-index = 6

Forward Citations = 70(Granted Patents)

Company Filing History:

16 out of 132,108

Samsung Electronics Co., Ltd.

patents

Years Active: 2010-2018

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16 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10153277 - Integrated circuit device and method of fabricating the same (2018-12-11),

2. 9318477 - Semiconductor device having dummy cell array (2016-04-19),

3. 9105467 - Dummy cell array for fin field-effect transistor device and semiconductor integrated circuit including the dummy cell array (2015-08-11),

4. 8525147 - Semiconductor devices including a transistor with elastic channel (2013-09-03),

5. 8391057 - Switch and method of forming the same (2013-03-05),

6. 8270211 - Electromechanical switch and method of forming the same (2012-09-18),

7. 8222067 - Method of manufacturing multibit electro-mechanical memory device having movable electrode (2012-07-17),

8. 8106464 - Semiconductor device having bar type active pattern (2012-01-31),

9. 7973343 - Multibit electro-mechanical memory device having cantilever electrodes (2011-07-05),

10. 7939436 - Method of fabricating a semiconductor device (2011-05-10),

11. 7929341 - Electromechanical switch and method of forming the same (2011-04-19),

12. 7871875 - Fin field effect transistor and method of manufacturing the same (2011-01-18),

13. 7868401 - Multibit electro-mechanical memory device having at least one cantilever electrode and at least one gate line and manufacturing method thereof (2011-01-11),

14. 7821821 - Multibit electro-mechanical device and method of manufacturing the same (2010-10-26),

15. 7791936 - Multibit electro-mechanical memory device and method of manufacturing the same (2010-09-07),

Title: Ji-myoung Lee: Pioneering Innovation in Semiconductor Technology

Introduction:

Ji-myoung Lee, a visionary inventor from Yongin-si, Korea, has left an indelible mark on the world of semiconductor technology. With a staggering 16 patents to his name, Lee's inventive spirit and unwavering dedication to pushing boundaries have been instrumental in transforming the landscape of innovation.

Latest Patents:

One of Lee's recent breakthroughs includes the development of an integrated circuit device and a method of fabricating the same. This groundbreaking technology features a unique design that optimizes gate structure space, enhancing the efficiency and performance of integrated circuits. Additionally, his semiconductor device boasting a dummy cell array showcases his prowess in creating cutting-edge solutions for complex technological challenges.

Career Highlights:

Currently affiliated with Samsung Electronics Co., Ltd., one of the leading tech giants globally, Lee continues to drive innovation within the company. His expertise and inventive mindset have played a pivotal role in propelling Samsung's advancements in semiconductor technologies to new heights.

Collaborations:

Collaborating with esteemed peers like Min-sang Kim and Sung-Min Kim, Lee has fostered a culture of innovation within his workplace. Together, they have combined their talents and expertise to tackle intricate technological problems, resulting in groundbreaking solutions that have reshaped the industry.

Conclusion:

Ji-myoung Lee's journey as an inventor exemplifies the power of creativity, perseverance, and collaboration in driving meaningful change. His legacy will undoubtedly continue to inspire future generations of inventors and shape the course of innovation for years to come, solidifying his place as a true pioneer in the realm of semiconductor technology.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: